From patchwork Fri Jan 5 18:00:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10146873 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BC09D601A1 for ; Fri, 5 Jan 2018 18:00:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB1FA23B23 for ; Fri, 5 Jan 2018 18:00:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FE002580E; Fri, 5 Jan 2018 18:00:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1432B23B24 for ; Fri, 5 Jan 2018 18:00:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 319AE6E3C8; Fri, 5 Jan 2018 18:00:28 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 55ED06E3BF; Fri, 5 Jan 2018 18:00:26 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4406360B21; Fri, 5 Jan 2018 18:00:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515175226; bh=2CBuZKA8NhG7fE299w8XE7T/XqlVuhXQXoe7IgqmBBc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ecB1MMH1uUpFrJ2Z5Ux4Tx9v9KqFegCzhXK3EmWrBkvoW2fKgT7+MSEG1xrSiC4jO 405xlSWhuD3YTwsGNdHlet66B/jFZ4aMbuf63jqvXXQKbfwumtROGvg8zmuZHpXK2b kpY9P3PyUQ9C0P7/z2b8Nv0yuRkN92xavJ3S/v1o= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5A71C6079C; Fri, 5 Jan 2018 18:00:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515175225; bh=2CBuZKA8NhG7fE299w8XE7T/XqlVuhXQXoe7IgqmBBc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DKroMvs/NL3O+UQjIsHqTQ74JZPNvKvfvKEVcM9QOiJa7/EA/e38yPwy/6uYiNuMU rm7aHc2xLXeGp2QkKfCr6E3QF10bU3OllPpKOXgCaGnz9qjFoIlTFHWs/TgQOeo6pI h21l1a+0NriQYCOvTTJx6TlGgcCCcQkGVDn6e9Ek= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5A71C6079C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Subject: [PATCH 1/4] drm/msm: gpu: Use drm_printer to consolidate the show/dump code Date: Fri, 5 Jan 2018 11:00:18 -0700 Message-Id: <1515175221-5601-2-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1515175221-5601-1-git-send-email-jcrouse@codeaurora.org> References: <1515175221-5601-1-git-send-email-jcrouse@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Use drm_printer to abstract the show/dump debug code so we can use the same code for both the kernel log and seq_file paths. Maintaining the existing dump format mandates that we break the single show function into two but thats a small price to pay for removing a bunch of code and consolidating the path. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 18 +++------ drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 15 ++----- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 18 +++------ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 70 +++++++++------------------------ drivers/gpu/drm/msm/adreno/adreno_gpu.h | 2 + 5 files changed, 34 insertions(+), 89 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c index 4baef27..29bb15b 100644 --- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c @@ -39,7 +39,6 @@ extern bool hang_debug; -static void a3xx_dump(struct msm_gpu *gpu); static bool a3xx_idle(struct msm_gpu *gpu); static bool a3xx_me_init(struct msm_gpu *gpu) @@ -300,18 +299,18 @@ static int a3xx_hw_init(struct msm_gpu *gpu) static void a3xx_recover(struct msm_gpu *gpu) { + struct drm_printer p = drm_info_printer(gpu->dev->dev); int i; - adreno_dump_info(gpu); + adreno_show_info(gpu, &p); - for (i = 0; i < 8; i++) { - printk("CP_SCRATCH_REG%d: %u\n", i, + for (i = 0; i < 8; i++) + drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i, gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); - } /* dump registers before resetting gpu, if enabled: */ if (hang_debug) - a3xx_dump(gpu); + adreno_show_regs(gpu, &p); gpu_write(gpu, REG_A3XX_RBBM_SW_RESET_CMD, 1); gpu_read(gpu, REG_A3XX_RBBM_SW_RESET_CMD); @@ -419,13 +418,6 @@ static void a3xx_show(struct msm_gpu *gpu, struct seq_file *m) } #endif -/* would be nice to not have to duplicate the _show() stuff with printk(): */ -static void a3xx_dump(struct msm_gpu *gpu) -{ - printk("status: %08x\n", - gpu_read(gpu, REG_A3XX_RBBM_STATUS)); - adreno_dump(gpu); -} /* Register offset defines for A3XX */ static const unsigned int a3xx_register_offsets[REG_ADRENO_REGISTER_MAX] = { REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_BASE, REG_AXXX_CP_RB_BASE), diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c index 8199a4b..d9742b1 100644 --- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c @@ -30,7 +30,6 @@ A4XX_INT0_UCHE_OOB_ACCESS) extern bool hang_debug; -static void a4xx_dump(struct msm_gpu *gpu); static bool a4xx_idle(struct msm_gpu *gpu); /* @@ -298,18 +297,19 @@ static int a4xx_hw_init(struct msm_gpu *gpu) static void a4xx_recover(struct msm_gpu *gpu) { + struct drm_printer p = drm_info_printer(gpu->dev->dev); int i; - adreno_dump_info(gpu); + adreno_show_info(gpu, &p); for (i = 0; i < 8; i++) { - printk("CP_SCRATCH_REG%d: %u\n", i, + drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i, gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i)); } /* dump registers before resetting gpu, if enabled: */ if (hang_debug) - a4xx_dump(gpu); + adreno_show_regs(gpu, &p); gpu_write(gpu, REG_A4XX_RBBM_SW_RESET_CMD, 1); gpu_read(gpu, REG_A4XX_RBBM_SW_RESET_CMD); @@ -475,13 +475,6 @@ static void a4xx_show(struct msm_gpu *gpu, struct seq_file *m) REG_ADRENO_DEFINE(REG_ADRENO_CP_RB_CNTL, REG_A4XX_CP_RB_CNTL), }; -static void a4xx_dump(struct msm_gpu *gpu) -{ - printk("status: %08x\n", - gpu_read(gpu, REG_A4XX_RBBM_STATUS)); - adreno_dump(gpu); -} - static int a4xx_pm_resume(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); int ret; diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index a1f4eee..deec597 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -22,7 +22,6 @@ #include "a5xx_gpu.h" extern bool hang_debug; -static void a5xx_dump(struct msm_gpu *gpu); #define GPU_PAS_ID 13 @@ -755,17 +754,17 @@ static int a5xx_hw_init(struct msm_gpu *gpu) static void a5xx_recover(struct msm_gpu *gpu) { + struct drm_printer p = drm_info_printer(gpu->dev->dev); int i; - adreno_dump_info(gpu); + adreno_show_info(gpu, &p); - for (i = 0; i < 8; i++) { - printk("CP_SCRATCH_REG%d: %u\n", i, + for (i = 0; i < 8; i++) + drm_printf(&p, "CP_SCRATCH_REG%d: %u\n", i, gpu_read(gpu, REG_A5XX_CP_SCRATCH_REG(i))); - } if (hang_debug) - a5xx_dump(gpu); + adreno_show_regs(gpu, &p); gpu_write(gpu, REG_A5XX_RBBM_SW_RESET_CMD, 1); gpu_read(gpu, REG_A5XX_RBBM_SW_RESET_CMD); @@ -1073,13 +1072,6 @@ static irqreturn_t a5xx_irq(struct msm_gpu *gpu) 0xB9A0, 0xB9BF, ~0 }; -static void a5xx_dump(struct msm_gpu *gpu) -{ - dev_info(gpu->dev->dev, "status: %08x\n", - gpu_read(gpu, REG_A5XX_RBBM_STATUS)); - adreno_dump(gpu); -} - static int a5xx_pm_resume(struct msm_gpu *gpu) { int ret; diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 2f0610f..60b3c99 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -362,13 +362,12 @@ bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) return false; } -#ifdef CONFIG_DEBUG_FS -void adreno_show(struct msm_gpu *gpu, struct seq_file *m) +void adreno_show_info(struct msm_gpu *gpu, struct drm_printer *p) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); int i; - seq_printf(m, "revision: %d (%d.%d.%d.%d)\n", + drm_printf(p, "revision: %d (%d.%d.%d.%d)\n", adreno_gpu->info->revn, adreno_gpu->rev.core, adreno_gpu->rev.major, adreno_gpu->rev.minor, adreno_gpu->rev.patchid); @@ -376,65 +375,22 @@ void adreno_show(struct msm_gpu *gpu, struct seq_file *m) for (i = 0; i < gpu->nr_rings; i++) { struct msm_ringbuffer *ring = gpu->rb[i]; - seq_printf(m, "rb %d: fence: %d/%d\n", i, + drm_printf(p, "rb %d: fence: %d/%d\n", i, ring->memptrs->fence, ring->seqno); - seq_printf(m, " rptr: %d\n", + drm_printf(p, " rptr: %d\n", get_rptr(adreno_gpu, ring)); - seq_printf(m, "rb wptr: %d\n", get_wptr(ring)); - } - - /* dump these out in a form that can be parsed by demsm: */ - seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name); - for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) { - uint32_t start = adreno_gpu->registers[i]; - uint32_t end = adreno_gpu->registers[i+1]; - uint32_t addr; - - for (addr = start; addr <= end; addr++) { - uint32_t val = gpu_read(gpu, addr); - seq_printf(m, "IO:R %08x %08x\n", addr<<2, val); - } + drm_printf(p, "rb wptr: %d\n", get_wptr(ring)); } } -#endif -/* Dump common gpu status and scratch registers on any hang, to make - * the hangcheck logs more useful. The scratch registers seem always - * safe to read when GPU has hung (unlike some other regs, depending - * on how the GPU hung), and they are useful to match up to cmdstream - * dumps when debugging hangs: - */ -void adreno_dump_info(struct msm_gpu *gpu) -{ - struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); - int i; - - printk("revision: %d (%d.%d.%d.%d)\n", - adreno_gpu->info->revn, adreno_gpu->rev.core, - adreno_gpu->rev.major, adreno_gpu->rev.minor, - adreno_gpu->rev.patchid); - - for (i = 0; i < gpu->nr_rings; i++) { - struct msm_ringbuffer *ring = gpu->rb[i]; - - printk("rb %d: fence: %d/%d\n", i, - ring->memptrs->fence, - ring->seqno); - - printk("rptr: %d\n", get_rptr(adreno_gpu, ring)); - printk("rb wptr: %d\n", get_wptr(ring)); - } -} - -/* would be nice to not have to duplicate the _show() stuff with printk(): */ -void adreno_dump(struct msm_gpu *gpu) +void adreno_show_regs(struct msm_gpu *gpu, struct drm_printer *p) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); int i; /* dump these out in a form that can be parsed by demsm: */ - printk("IO:region %s 00000000 00020000\n", gpu->name); + drm_printf(p, "IO:region %s 00000000 00020000\n", gpu->name); for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) { uint32_t start = adreno_gpu->registers[i]; uint32_t end = adreno_gpu->registers[i+1]; @@ -442,11 +398,21 @@ void adreno_dump(struct msm_gpu *gpu) for (addr = start; addr <= end; addr++) { uint32_t val = gpu_read(gpu, addr); - printk("IO:R %08x %08x\n", addr<<2, val); + drm_printf(p, "IO:R %08x %08x\n", addr<<2, val); } } } +#ifdef CONFIG_DEBUG_FS +void adreno_show(struct msm_gpu *gpu, struct seq_file *m) +{ + struct drm_printer p = drm_seq_file_printer(m); + + adreno_show_info(gpu, &p); + adreno_show_regs(gpu, &p); +} +#endif + static uint32_t ring_freewords(struct msm_ringbuffer *ring) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(ring->gpu); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 28e3de6..3443071 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -223,6 +223,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, int nr_rings); void adreno_gpu_cleanup(struct adreno_gpu *gpu); +void adreno_show_info(struct msm_gpu *gpu, struct drm_printer *p); +void adreno_show_regs(struct msm_gpu *gpu, struct drm_printer *p); /* ringbuffer helpers (the parts that are adreno specific) */