@@ -42,6 +42,7 @@
/dts-v1/;
#include "stm32f746.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/memory/stm32-sdram.h>
/ {
@@ -264,3 +265,73 @@
bus-width = <4>;
max-frequency = <25000000>;
};
+
+<dc {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ltdc_out_dsi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <<dc_out_dsi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint {
+ remote-endpoint = <&dsi_panel_in>;
+ };
+ };
+ };
+
+ panel-dsi@0 {
+ compatible = "orisetech,otm8009a";
+ reg = <0>; /* dsi virtual channel (0..3) */
+ reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ port {
+ dsi_panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+
+ display-timings {
+ timing@0 {
+ clock-frequency = <32729000>;
+ hactive = <480>;
+ hfront-porch = <120>;
+ hback-porch = <63>;
+ hsync-len = <120>;
+ vactive = <800>;
+ vfront-porch = <12>;
+ vback-porch = <12>;
+ vsync-len = <12>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <1>;
+ };
+ };
+ };
+};
Enable the display controller, mipi dsi bridge & panel. Set panel display timings. Signed-off-by: yannick fertre <yannick.fertre@st.com> --- arch/arm/dts/stm32f769-disco.dts | 71 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+)