| Message ID | 1529584329-632-4-git-send-email-spanda@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Sandeep Panda (2018-06-21 05:32:07) > diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt > new file mode 100644 > index 000000000000..c8b8f018356f > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt > @@ -0,0 +1,86 @@ > +SN65DSI86 DSI to eDP bridge chip > +-------------------------------- > + > +This is the binding for Texas Instruments SN65DSI86 bridge. > +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf > + > +Required properties: > +- compatible: Must be "ti,sn65dsi86" > +- reg: i2c address of the chip, 0x2d as per datasheet > +- enable-gpios: OF device-tree gpio specification for bridge_en pin (active high) > + > +- vccio-supply: A 1.8V supply that powers up the digital IOs. > +- vpll-supply: A 1.8V supply that powers up the displayport PLL. > +- vcca-supply: A 1.2V supply that powers up the analog circuits. > +- vcc-supply: A 1.2V supply that powers up the digital core. > + > +Optional properties: > +- interrupts-extended: Specifier for the SN65DSI86 interrupt line. > + > +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing > + > +- gpio-controller: Marks the device has a GPIO controller. > +- #gpio-cells : Should be two. The first cell is the pin number and > + the second cell is used to specify flags. > + See ../../gpio/gpio.txt for more information. > +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of > + the cell formats. > + > +- clock-names: should be "refclk" > +- clocks: Specification for input reference clock. The reference > + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. > + > +- data-lanes: See ../../media/video-interface.txt > +- lane-polarities: See ../../media/video-interface.txt We need another property for suspend-gpios function of GPIO1. I suppose for the other GPIOs we don't need anything like this because they're output functions only? GPIO4 can do PWM and I guess if pwm is used in DT from here then the driver can mux that out of gpio4 properly. I have no idea how the hsync and vsync GPIOs would work though. I see that GPIO3 can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would guess those are in output mode only. Maybe that's just another property on this node to indicate if we should mux out the function or not. Usually that's done from pinctrl though. I don't have a use case for those functions but I do care about suspend gpios so at least add that one please.
On 2018-06-22 06:42, Stephen Boyd wrote: > Quoting Sandeep Panda (2018-06-21 05:32:07) >> diff --git >> a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt >> b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt >> new file mode 100644 >> index 000000000000..c8b8f018356f >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt >> @@ -0,0 +1,86 @@ >> +SN65DSI86 DSI to eDP bridge chip >> +-------------------------------- >> + >> +This is the binding for Texas Instruments SN65DSI86 bridge. >> +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf >> + >> +Required properties: >> +- compatible: Must be "ti,sn65dsi86" >> +- reg: i2c address of the chip, 0x2d as per datasheet >> +- enable-gpios: OF device-tree gpio specification for bridge_en pin >> (active high) >> + >> +- vccio-supply: A 1.8V supply that powers up the digital IOs. >> +- vpll-supply: A 1.8V supply that powers up the displayport PLL. >> +- vcca-supply: A 1.2V supply that powers up the analog circuits. >> +- vcc-supply: A 1.2V supply that powers up the digital core. >> + >> +Optional properties: >> +- interrupts-extended: Specifier for the SN65DSI86 interrupt line. >> + >> +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID >> probing >> + >> +- gpio-controller: Marks the device has a GPIO controller. >> +- #gpio-cells : Should be two. The first cell is the pin number >> and >> + the second cell is used to specify flags. >> + See ../../gpio/gpio.txt for more information. >> +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description >> of >> + the cell formats. >> + >> +- clock-names: should be "refclk" >> +- clocks: Specification for input reference clock. The reference >> + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 >> MHz. >> + >> +- data-lanes: See ../../media/video-interface.txt >> +- lane-polarities: See ../../media/video-interface.txt > > We need another property for suspend-gpios function of GPIO1. I suppose > for the other GPIOs we don't need anything like this because they're > output functions only? GPIO4 can do PWM and I guess if pwm is used in > DT > from here then the driver can mux that out of gpio4 properly. I have no > idea how the hsync and vsync GPIOs would work though. I see that GPIO3 > can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would > guess > those are in output mode only. Maybe that's just another property on > this node to indicate if we should mux out the function or not. Usually > that's done from pinctrl though. I don't have a use case for those > functions but I do care about suspend gpios so at least add that one > please. I was thinking of adding gpio1 (suspend-gpio) documentation when we add support for PSR feature. Since for PSR we will be using this suspoend-gpio.
Quoting spanda@codeaurora.org (2018-06-24 21:56:05) > On 2018-06-22 06:42, Stephen Boyd wrote: > > Quoting Sandeep Panda (2018-06-21 05:32:07) > >> + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 > >> MHz. > >> + > >> +- data-lanes: See ../../media/video-interface.txt > >> +- lane-polarities: See ../../media/video-interface.txt > > > > We need another property for suspend-gpios function of GPIO1. I suppose > > for the other GPIOs we don't need anything like this because they're > > output functions only? GPIO4 can do PWM and I guess if pwm is used in > > DT > > from here then the driver can mux that out of gpio4 properly. I have no > > idea how the hsync and vsync GPIOs would work though. I see that GPIO3 > > can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would > > guess > > those are in output mode only. Maybe that's just another property on > > this node to indicate if we should mux out the function or not. Usually > > that's done from pinctrl though. I don't have a use case for those > > functions but I do care about suspend gpios so at least add that one > > please. > > I was thinking of adding gpio1 (suspend-gpio) documentation when we add > support for PSR feature. Since for PSR we will be using this > suspoend-gpio. > Ok sure, but I don't see any harm in adding it now. I'm fine with waiting for the binding update when the PSR patches come if you feel like adding it now will delay something.
On Mon, Jun 25, 2018 at 12:06:49AM -0700, Stephen Boyd wrote: > Quoting spanda@codeaurora.org (2018-06-24 21:56:05) > > On 2018-06-22 06:42, Stephen Boyd wrote: > > > Quoting Sandeep Panda (2018-06-21 05:32:07) > > >> + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 > > >> MHz. > > >> + > > >> +- data-lanes: See ../../media/video-interface.txt > > >> +- lane-polarities: See ../../media/video-interface.txt > > > > > > We need another property for suspend-gpios function of GPIO1. I suppose > > > for the other GPIOs we don't need anything like this because they're > > > output functions only? GPIO4 can do PWM and I guess if pwm is used in > > > DT > > > from here then the driver can mux that out of gpio4 properly. I have no > > > idea how the hsync and vsync GPIOs would work though. I see that GPIO3 > > > can do DSIA hsync or vsync and GPIO2 can do DSIA vsync and I would > > > guess > > > those are in output mode only. Maybe that's just another property on > > > this node to indicate if we should mux out the function or not. Usually > > > that's done from pinctrl though. I don't have a use case for those > > > functions but I do care about suspend gpios so at least add that one > > > please. > > > > I was thinking of adding gpio1 (suspend-gpio) documentation when we add > > support for PSR feature. Since for PSR we will be using this > > suspoend-gpio. > > > > Ok sure, but I don't see any harm in adding it now. I'm fine with > waiting for the binding update when the PSR patches come if you feel > like adding it now will delay something. Please make the binding complete as possible now. Rob
diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt new file mode 100644 index 000000000000..c8b8f018356f --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt @@ -0,0 +1,86 @@ +SN65DSI86 DSI to eDP bridge chip +-------------------------------- + +This is the binding for Texas Instruments SN65DSI86 bridge. +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf + +Required properties: +- compatible: Must be "ti,sn65dsi86" +- reg: i2c address of the chip, 0x2d as per datasheet +- enable-gpios: OF device-tree gpio specification for bridge_en pin (active high) + +- vccio-supply: A 1.8V supply that powers up the digital IOs. +- vpll-supply: A 1.8V supply that powers up the displayport PLL. +- vcca-supply: A 1.2V supply that powers up the analog circuits. +- vcc-supply: A 1.2V supply that powers up the digital core. + +Optional properties: +- interrupts-extended: Specifier for the SN65DSI86 interrupt line. + +- ddc-i2c-bus: phandle of the I2C controller used for DDC EDID probing + +- gpio-controller: Marks the device has a GPIO controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify flags. + See ../../gpio/gpio.txt for more information. +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of + the cell formats. + +- clock-names: should be "refclk" +- clocks: Specification for input reference clock. The reference + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. + +- data-lanes: See ../../media/video-interface.txt +- lane-polarities: See ../../media/video-interface.txt + +Required nodes: +This device has two video ports. Their connections are modelled using the +OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. + +- Video port 0 for DSI input +- Video port 1 for eDP output + +Example +------- + +edp-bridge@2d { + compatible = "ti,sn65dsi86"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2d>; + + enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; + + interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>; + + vccio-supply = <&pm8916_l17>; + vcca-supply = <&pm8916_l6>; + vpll-supply = <&pm8916_l17>; + vcc-supply = <&pm8916_l6>; + + clock-names = "refclk"; + clocks = <&input_refclk>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + edp_bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + edp_bridge_out: endpoint { + data-lanes = <2 1 3 0>; + lane-polarities = <0 1 0 1>; + remote-endpoint = <&edp_panel_in>; + }; + }; + }; +}
Document the bindings used for the sn65dsi86 DSI to eDP bridge. Changes in v1: - Rephrase the dt-binding descriptions to be more inline with existing bindings (Andrzej Hajda). - Add missing dt-binding that are parsed by corresponding driver (Andrzej Hajda). Changes in v2: - Remove edp panel specific dt-binding entries. Only keep bridge specific entries (Sean Paul). - Remove custom-modes dt entry since its usage is removed from driver also (Sean Paul). - Remove is-pluggable dt entry since this will not be needed anymore (Sean Paul). Changes in v3: - Remove irq-gpio dt entry and instead populate is an interrupt property (Rob Herring). Changes in v4: - Add link to bridge chip datasheet (Stephen Boyd) - Add vpll and vcc regulator supply bindings (Stephen Boyd) - Add ref clk optional dt binding (Stephen Boyd) - Add gpio-controller optional dt binding (Stephen Boyd) Changes in v5: - Use clock property to specify the input refclk (Stephen Boyd). - Update gpio cell and pwm cell numbers (Stephen Boyd). Changes in v6: - Add property to mention the lane mapping scheme and polarity inversion (Stephen Boyd). Changes in v7: - Detail description of lane mapping scheme dt property (Andrzej Hajda/ Rob Herring). - Removed HDP gpio binding, since the bridge uses IRQ signal to determine HPD, and IRQ property is already documented in binding. Changes in v8: - Removed unnecessary explanation of lane mapping and polarity dt property, since these are already explained in media/video-interface dt binidng (Rob Herring). Changes in v9: - Avoid putting re-definition of lane mapping and polarity dt binding (Rob Herring). Changes in v10: - Use interrupts-extended property instead of interrupts to specify interrupt line (Andrzej Hajda). - Move data-lanes and lane-polarity property example to proper place (Andrzej Hajda). Signed-off-by: Sandeep Panda <spanda@codeaurora.org> --- .../bindings/display/bridge/ti,sn65dsi86.txt | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt