From patchwork Fri Jun 29 11:22:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 10496333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 654816022E for ; Fri, 29 Jun 2018 11:22:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 55FC5286F6 for ; Fri, 29 Jun 2018 11:22:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4948C298C6; Fri, 29 Jun 2018 11:22:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A5050286F6 for ; Fri, 29 Jun 2018 11:22:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7DE456F056; Fri, 29 Jun 2018 11:22:39 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by gabe.freedesktop.org (Postfix) with ESMTPS id E265C6F056 for ; Fri, 29 Jun 2018 11:22:37 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w5TBJ0jr009754; Fri, 29 Jun 2018 13:22:31 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2jwk7585t2-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 29 Jun 2018 13:22:31 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5E8D738; Fri, 29 Jun 2018 11:22:29 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3A5BE2937; Fri, 29 Jun 2018 11:22:29 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 29 Jun 2018 13:22:29 +0200 Received: from localhost (10.201.23.68) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 29 Jun 2018 13:22:28 +0200 From: Yannick Fertre To: Yannick Fertre , Philippe Cornu , Benjamin Gaignard , Vincent Abriou , David Airlie , , Subject: [PATCH] drm/stm: ltdc: filter mode pixel clock vs pad constraint Date: Fri, 29 Jun 2018 13:22:22 +0200 Message-ID: <1530271342-5532-1-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-06-29_03:, , signatures=0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Filter the requested mode pixel clock frequency according to the pad maximum supported frequency. Signed-off-by: Yannick Fertre Reviewed-by: Philippe Cornu Tested-by: Philippe Cornu --- drivers/gpu/drm/stm/ltdc.c | 16 ++++++++++++---- drivers/gpu/drm/stm/ltdc.h | 1 + 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 00e3262..96d20c2 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -491,6 +491,14 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc, int target_max = target + CLK_TOLERANCE_HZ; int result; + result = clk_round_rate(ldev->pixel_clk, target); + + DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result); + + /* Filter modes according to the max frequency supported by the pads */ + if (result > ldev->caps.pad_max_freq_hz) + return MODE_CLOCK_HIGH; + /* * Accept all "preferred" modes: * - this is important for panels because panel clock tolerances are @@ -502,10 +510,6 @@ static void ltdc_crtc_atomic_disable(struct drm_crtc *crtc, if (mode->type & DRM_MODE_TYPE_PREFERRED) return MODE_OK; - result = clk_round_rate(ldev->pixel_clk, target); - - DRM_DEBUG_DRIVER("clk rate target %d, available %d\n", target, result); - /* * Filter modes according to the clock value, particularly useful for * hdmi modes that require precise pixel clocks. @@ -1039,11 +1043,15 @@ static int ltdc_get_caps(struct drm_device *ddev) * does not work on 2nd layer. */ ldev->caps.non_alpha_only_l1 = true; + ldev->caps.pad_max_freq_hz = 90000000; + if (ldev->caps.hw_version == HWVER_10200) + ldev->caps.pad_max_freq_hz = 65000000; break; case HWVER_20101: ldev->caps.reg_ofs = REG_OFS_4; ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1; ldev->caps.non_alpha_only_l1 = false; + ldev->caps.pad_max_freq_hz = 150000000; break; default: return -ENODEV; diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index c14e4db..0294d38 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -20,6 +20,7 @@ struct ltdc_caps { u32 bus_width; /* bus width (32 or 64 bits) */ const u32 *pix_fmt_hw; /* supported pixel formats */ bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */ + int pad_max_freq_hz; /* max frequency supported by pad */ }; #define LTDC_MAX_LAYER 4