From patchwork Wed Aug 8 03:20:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10559467 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 89984174A for ; Wed, 8 Aug 2018 03:20:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78D5F29359 for ; Wed, 8 Aug 2018 03:20:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6D0EC2A412; Wed, 8 Aug 2018 03:20:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F10612A3F1 for ; Wed, 8 Aug 2018 03:20:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 254EB6E0A6; Wed, 8 Aug 2018 03:20:32 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id E91F76E03C; Wed, 8 Aug 2018 03:20:30 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id D012960B73; Wed, 8 Aug 2018 03:20:30 +0000 (UTC) Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6E1D4606FC; Wed, 8 Aug 2018 03:20:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6E1D4606FC From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 10/13] drm/msm/dpu: remove topology name Date: Tue, 7 Aug 2018 20:20:08 -0700 Message-Id: <1533698411-29819-1-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hoegsberg@google.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Strip down the support for topology enums. It can be replaced with simple hw count checks. changes in v2: - none changes in v3: - none Change-Id: If9b2a4db5bbdf8545b99b6d90825e256d014382d Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 9 ++++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 7 ++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ------------ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 9 --------- 5 files changed, 10 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 7b82e2d..58647ed 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1019,7 +1019,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, struct drm_connector *conn = NULL, *conn_iter; struct dpu_rm_hw_iter pp_iter, ctl_iter; struct msm_display_topology topology; - enum dpu_rm_topology_name topology_name; struct dpu_hw_ctl *hw_ctl[MAX_CHANNELS_PER_ENC]; int i = 0, ret; @@ -1077,7 +1076,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, hw_ctl[i] = (struct dpu_hw_ctl *)ctl_iter.hw; } - topology_name = dpu_rm_get_topology_name(topology); for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; @@ -1097,7 +1095,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, phys->hw_ctl = hw_ctl[i]; phys->connector = conn->state->connector; - phys->topology_name = topology_name; if (phys->ops.mode_set) phys->ops.mode_set(phys, mode, adj_mode); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index c7df8aa..d08b5d5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -24,6 +24,7 @@ #include "dpu_hw_top.h" #include "dpu_hw_cdm.h" #include "dpu_encoder.h" +#include "dpu_crtc.h" #define DPU_ENCODER_NAME_MAX 16 @@ -219,7 +220,6 @@ struct dpu_encoder_irq { * @split_role: Role to play in a split-panel configuration * @intf_mode: Interface mode * @intf_idx: Interface index on dpu hardware - * @topology_name: topology selected for the display * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes * @enable_state: Enable state tracking * @vblank_refcount: Reference count of vblank request @@ -249,7 +249,6 @@ struct dpu_encoder_phys { enum dpu_enc_split_role split_role; enum dpu_intf_mode intf_mode; enum dpu_intf intf_idx; - enum dpu_rm_topology_name topology_name; spinlock_t *enc_spinlock; enum dpu_enc_enable_state enable_state; atomic_t vblank_refcount; @@ -367,11 +366,15 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode( struct dpu_encoder_phys *phys_enc) { + struct dpu_crtc_state *dpu_cstate; + if (!phys_enc || phys_enc->enable_state == DPU_ENC_DISABLING) return BLEND_3D_NONE; + dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); + if (phys_enc->split_role == ENC_ROLE_SOLO && - phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE_3DMERGE) + (dpu_cstate->num_mixers == 2)) return BLEND_3D_H_ROW_INT; return BLEND_3D_NONE; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index a0b3744..88867c3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -355,13 +355,14 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx) static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc) { + struct dpu_crtc_state *dpu_cstate; + if (!phys_enc) return false; - if (phys_enc->topology_name == DPU_RM_TOPOLOGY_DUALPIPE) - return true; + dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); - return false; + return (dpu_cstate->num_ctls > 1); } static bool dpu_encoder_phys_vid_needs_single_flush( diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 13c0a36..1457ae5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -146,18 +146,6 @@ struct dpu_hw_mdp *dpu_rm_get_mdp(struct dpu_rm *rm) return rm->hw_mdp; } -enum dpu_rm_topology_name -dpu_rm_get_topology_name(struct msm_display_topology topology) -{ - int i; - - for (i = 0; i < DPU_RM_TOPOLOGY_MAX; i++) - if (RM_IS_TOPOLOGY_MATCH(g_top_table[i], topology)) - return g_top_table[i].top_name; - - return DPU_RM_TOPOLOGY_NONE; -} - void dpu_rm_init_hw_iter( struct dpu_rm_hw_iter *iter, uint32_t enc_id, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index ffd1841..de52c03 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -187,13 +187,4 @@ void dpu_rm_init_hw_iter( */ int dpu_rm_check_property_topctl(uint64_t val); -/** - * dpu_rm_get_topology_name - returns the name of the the given topology - * definition - * @topology: topology definition - * @Return: name of the topology - */ -enum dpu_rm_topology_name -dpu_rm_get_topology_name(struct msm_display_topology topology); - #endif /* __DPU_RM_H__ */