From patchwork Wed Aug 8 03:20:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10559471 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 86C9D139A for ; Wed, 8 Aug 2018 03:20:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7627529359 for ; Wed, 8 Aug 2018 03:20:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6A9982A412; Wed, 8 Aug 2018 03:20:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 119E52A3F1 for ; Wed, 8 Aug 2018 03:20:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4FBF6E4A0; Wed, 8 Aug 2018 03:20:34 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 01BA16E1EF; Wed, 8 Aug 2018 03:20:32 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E30BF60BDE; Wed, 8 Aug 2018 03:20:32 +0000 (UTC) Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id DFED960B7D; Wed, 8 Aug 2018 03:20:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DFED960B7D From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 12/13] drm/msm/dpu: add atomic private object to dpu kms Date: Tue, 7 Aug 2018 20:20:10 -0700 Message-Id: <1533698411-29819-3-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533698411-29819-1-git-send-email-jsanka@codeaurora.org> References: <1533698411-29819-1-git-send-email-jsanka@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hoegsberg@google.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Subclass drm private state for DPU for handling driver specific data. Adds atomic private object and private object lock to dpu kms. Provides helper function to retrieve DPU private data from current atomic state. changes in v2: - none changes in v3: - rebase on [1] [1] https://gitlab.freedesktop.org/seanpaul/dpu-staging/commits/for-next Change-Id: Iaab32badff224ffed024e6ef6576efc8b3af3aec Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 61 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 15 ++++++++ 2 files changed, 76 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 7dd6bd2..5e87b9d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1168,10 +1168,59 @@ static int dpu_kms_hw_init(struct msm_kms *kms) return rc; } +struct dpu_private_state *dpu_get_private_state(struct drm_atomic_state *state) +{ + struct msm_drm_private *priv = state->dev->dev_private; + struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms); + struct drm_private_state *priv_state; + int rc = 0; + + rc = drm_modeset_lock(&dpu_kms->priv_obj_lock, state->acquire_ctx); + if (rc) + return ERR_PTR(rc); + + priv_state = drm_atomic_get_private_obj_state(state, + &dpu_kms->priv_obj); + if (IS_ERR(priv_state)) + return ERR_PTR(-ENOMEM); + + return to_dpu_private_state(priv_state); +} + +static struct drm_private_state * +dpu_private_obj_duplicate_state(struct drm_private_obj *obj) +{ + struct dpu_private_state *dpu_priv_state; + + dpu_priv_state = kmemdup(obj->state, + sizeof(*dpu_priv_state), GFP_KERNEL); + if (!dpu_priv_state) + return NULL; + + __drm_atomic_helper_private_obj_duplicate_state(obj, + &dpu_priv_state->base); + + return &dpu_priv_state->base; +} + +static void dpu_private_obj_destroy_state(struct drm_private_obj *obj, + struct drm_private_state *state) +{ + struct dpu_private_state *dpu_priv_state = to_dpu_private_state(state); + + kfree(dpu_priv_state); +} + +static const struct drm_private_state_funcs priv_obj_funcs = { + .atomic_duplicate_state = dpu_private_obj_duplicate_state, + .atomic_destroy_state = dpu_private_obj_destroy_state, +}; + struct msm_kms *dpu_kms_init(struct drm_device *dev) { struct msm_drm_private *priv; struct dpu_kms *dpu_kms; + struct dpu_private_state *dpu_priv_state; int irq; if (!dev || !dev->dev_private) { @@ -1189,6 +1238,18 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev) } dpu_kms->base.irq = irq; + /* Initialize private obj's */ + drm_modeset_lock_init(&dpu_kms->priv_obj_lock); + + dpu_priv_state = kzalloc(sizeof(*dpu_priv_state), GFP_KERNEL); + if (!dpu_priv_state) + return ERR_PTR(-ENOMEM); + + + drm_atomic_private_obj_init(&dpu_kms->priv_obj, + &dpu_priv_state->base, + &priv_obj_funcs); + return &dpu_kms->base; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 66d4666..2579c983 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -145,6 +145,9 @@ struct dpu_kms { struct dpu_hw_vbif *hw_vbif[VBIF_MAX]; struct dpu_hw_mdp *hw_mdp; + struct drm_modeset_lock priv_obj_lock; + struct drm_private_obj priv_obj; + bool has_danger_ctrl; struct platform_device *pdev; @@ -152,12 +155,24 @@ struct dpu_kms { struct dss_module_power mp; }; +struct dpu_private_state { + struct drm_private_state base; +}; + struct vsync_info { u32 frame_count; u32 line_count; }; #define to_dpu_kms(x) container_of(x, struct dpu_kms, base) +#define to_dpu_private_state(x) container_of(x, struct dpu_private_state, base) + +/** + * dpu_get_private_state - get dpu private state from atomic state + * @state: drm atomic state + * Return: pointer to dpu private state object + */ +struct dpu_private_state *dpu_get_private_state(struct drm_atomic_state *state); /* get struct msm_kms * from drm_device * */ #define ddev_to_msm_kms(D) ((D) && (D)->dev_private ? \