From patchwork Tue Oct 9 04:27:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10631819 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 41AF916B1 for ; Tue, 9 Oct 2018 04:27:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32C6429A28 for ; Tue, 9 Oct 2018 04:27:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2724A29A36; Tue, 9 Oct 2018 04:27:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DCB0A29A28 for ; Tue, 9 Oct 2018 04:27:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B81F6E149; Tue, 9 Oct 2018 04:27:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A44F6E149; Tue, 9 Oct 2018 04:27:51 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 66AC260C7B; Tue, 9 Oct 2018 04:27:51 +0000 (UTC) Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 66DCD60C7D; Tue, 9 Oct 2018 04:27:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 66DCD60C7D From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 01/25] drm/msm/dpu: fix hw ctl retrieval for mixer muxing Date: Mon, 8 Oct 2018 21:27:18 -0700 Message-Id: <1539059262-8326-2-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1539059262-8326-1-git-send-email-jsanka@codeaurora.org> References: <1539059262-8326-1-git-send-email-jsanka@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hoegsberg@google.com, seanpaul@chromium.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Layer mixer/pingpong block counts and hw ctl block counts will not be same for all the topologies (e.g. layer mixer muxing to single interface) Use the encoder's split_role info to retrieve the respective control path for programming. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 96cdf06..d12f896 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1060,6 +1060,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, for (i = 0; i < dpu_enc->num_phys_encs; i++) { struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; + int ctl_index; if (phys) { if (!dpu_enc->hw_pp[i]) { @@ -1068,14 +1069,16 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, return; } - if (!hw_ctl[i]) { + ctl_index = phys->split_role == ENC_ROLE_SLAVE ? 1 : 0; + + if (!hw_ctl[ctl_index]) { DPU_ERROR_ENC(dpu_enc, "no ctl block assigned" - "at idx: %d\n", i); + "at idx: %d\n", ctl_index); return; } phys->hw_pp = dpu_enc->hw_pp[i]; - phys->hw_ctl = hw_ctl[i]; + phys->hw_ctl = hw_ctl[ctl_index]; phys->connector = conn->state->connector; if (phys->ops.mode_set)