| Message ID | 1545638931-24938-15-git-send-email-yongqiang.niu@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add drm support for MT8183 | expand |
Hi, Yongqiang: On Mon, 2018-12-24 at 16:08 +0800, Yongqiang Niu wrote: > This patch add connect function for ovl Could you describe more about how ovl-2l works? I guess that ovl-2l is a ovl hardware which has 3 layer, the bottom two layer is from DRAM and the top layer is from another hardware (maybe the ovl). If my guess is correct, why not just implement this function in mtk_ovl_layer_on()? In mtk_ovl_layer_on(), you could do as if (idx == ovl->data->layer_nr) { mtk_ddp_write_mask((1 << 2), comp, DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN); return; } So does mtk_ovl_layer_off(). Regards, CK > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > index a0ab760..3b2ce77 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c > @@ -27,6 +27,8 @@ > #define DISP_REG_OVL_EN 0x000c > #define DISP_REG_OVL_RST 0x0014 > #define DISP_REG_OVL_ROI_SIZE 0x0020 > +#define DISP_REG_OVL_DATAPATH_CON 0x0024 > +#define OVL_BGCLR_SEL_IN BIT(2) > #define DISP_REG_OVL_ROI_BGCLR 0x0028 > #define DISP_REG_OVL_SRC_CON 0x002c > #define DISP_REG_OVL_CON(n) (0x0030 + 0x20 * (n)) > @@ -245,6 +247,19 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > mtk_ovl_layer_on(comp, idx); > } > > +static void mtk_ovl_connect(struct mtk_ddp_comp *comp, > + enum mtk_ddp_comp_id prev) > +{ > + int is_ovl = 0; > + > + if (prev == DDP_COMPONENT_OVL0 || prev == DDP_COMPONENT_OVL1 || > + prev == DDP_COMPONENT_OVL0_2L || prev == DDP_COMPONENT_OVL1_2L) > + is_ovl = 1; > + > + mtk_ddp_write_mask((is_ovl << 2), comp, > + DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN); > +} > + > static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = { > .config = mtk_ovl_config, > .start = mtk_ovl_start, > @@ -255,6 +270,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, > .layer_on = mtk_ovl_layer_on, > .layer_off = mtk_ovl_layer_off, > .layer_config = mtk_ovl_layer_config, > + .connect = mtk_ovl_connect, > }; > > static int mtk_disp_ovl_bind(struct device *dev, struct device *master,
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index a0ab760..3b2ce77 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -27,6 +27,8 @@ #define DISP_REG_OVL_EN 0x000c #define DISP_REG_OVL_RST 0x0014 #define DISP_REG_OVL_ROI_SIZE 0x0020 +#define DISP_REG_OVL_DATAPATH_CON 0x0024 +#define OVL_BGCLR_SEL_IN BIT(2) #define DISP_REG_OVL_ROI_BGCLR 0x0028 #define DISP_REG_OVL_SRC_CON 0x002c #define DISP_REG_OVL_CON(n) (0x0030 + 0x20 * (n)) @@ -245,6 +247,19 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, mtk_ovl_layer_on(comp, idx); } +static void mtk_ovl_connect(struct mtk_ddp_comp *comp, + enum mtk_ddp_comp_id prev) +{ + int is_ovl = 0; + + if (prev == DDP_COMPONENT_OVL0 || prev == DDP_COMPONENT_OVL1 || + prev == DDP_COMPONENT_OVL0_2L || prev == DDP_COMPONENT_OVL1_2L) + is_ovl = 1; + + mtk_ddp_write_mask((is_ovl << 2), comp, + DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN); +} + static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = { .config = mtk_ovl_config, .start = mtk_ovl_start, @@ -255,6 +270,7 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx, .layer_on = mtk_ovl_layer_on, .layer_off = mtk_ovl_layer_off, .layer_config = mtk_ovl_layer_config, + .connect = mtk_ovl_connect, }; static int mtk_disp_ovl_bind(struct device *dev, struct device *master,
This patch add connect function for ovl Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)