From patchwork Tue Mar 12 18:13:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10849771 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 498DF1850 for ; Tue, 12 Mar 2019 18:14:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37A44284C9 for ; Tue, 12 Mar 2019 18:14:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B8DD2869A; Tue, 12 Mar 2019 18:14:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C5902284C9 for ; Tue, 12 Mar 2019 18:14:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32D9589FE8; Tue, 12 Mar 2019 18:14:15 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2AC0589FE8; Tue, 12 Mar 2019 18:14:14 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id BBA0061CC1; Tue, 12 Mar 2019 18:14:12 +0000 (UTC) Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CCF87619D0; Tue, 12 Mar 2019 18:14:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org CCF87619D0 From: Jordan Crouse To: freedreno@lists.freedesktop.org Subject: [PATCH v1 2/4] drm/msm/a6xx: Add zap shader load Date: Tue, 12 Mar 2019 12:13:40 -0600 Message-Id: <1552414422-9568-3-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1552414422-9568-1-git-send-email-jcrouse@codeaurora.org> References: <1552414422-9568-1-git-send-email-jcrouse@codeaurora.org> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552414454; bh=XavfODKbiYd3VUlO1pljeUXeZYLnBdMdaR2DWcS0Jjs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JrbbYWkZOVsu0kln05b2a3zLHb8zWleC9ZAsb5vmXRTCe2L4ZkeKGTz0LkKLwFQKK XVUzDZTaQNpx7Xjz197wN69BNb5WYnU+qGnxBH6fHDtMqGv82Q6NIPBwS+pkqnbftP TPQoO5/0aHXcMuXOXmPR1tZEmhlUVgH66j/6MWjw= X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1552414451; bh=XavfODKbiYd3VUlO1pljeUXeZYLnBdMdaR2DWcS0Jjs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NHINJMBrQ0nIJTVSwRpCmKbfxfoKgfYSE2MAJhuC3lVNa2ZAcXEygzmoqtAk6GsgF KgfdQEgjVEvMXyUqdsiQxr+0RYXn0J9kV5ISd80p6z/HfbjiNtFUw/2b9KqJ3XsVkB WE7+3leoW/0oglufdV7Q3Cz1f6j72CswhobHqy0Q= X-Mailman-Original-Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org X-Mailman-Original-Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jonathan Marek , Arnd Bergmann , David Airlie , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Bjorn Andersson , Mamta Shukla , Thomas Zimmermann , Sean Paul , Daniel Mack MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The a6xx GPU powers on in secure mode which restricts what memory it can write to. To get out of secure mode the GPU driver can write to REG_A6XX_RBBM_SECVID_TRUST_CNTL but on targets that are "secure" that register region is blocked and writes will cause the system to go down. For those targets we need to execute a special sequence that involves loadinga special shader that clears the GPU registers and use a PM4 sequence to pull the GPU out of secure. Add support for loading the zap shader and executing the secure sequence. For targets that do not support SCM or the specific SCM sequence this should fail and we would fall back to writing the register. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 38 +++++++++++++++++++++++++++++- drivers/gpu/drm/msm/adreno/adreno_device.c | 1 + 2 files changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index fefe773..5983e47 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -10,6 +10,8 @@ #include +#define GPU_PAS_ID 13 + static inline bool _a6xx_check_idle(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); @@ -343,6 +345,20 @@ static int a6xx_ucode_init(struct msm_gpu *gpu) return 0; } +static int a6xx_zap_shader_init(struct msm_gpu *gpu) +{ + static bool loaded; + int ret; + + if (loaded) + return 0; + + ret = adreno_zap_shader_load(gpu, GPU_PAS_ID); + + loaded = !ret; + return ret; +} + #define A6XX_INT_MASK (A6XX_RBBM_INT_0_MASK_CP_AHB_ERROR | \ A6XX_RBBM_INT_0_MASK_RBBM_ATB_ASYNCFIFO_OVERFLOW | \ A6XX_RBBM_INT_0_MASK_CP_HW_ERROR | \ @@ -491,7 +507,27 @@ static int a6xx_hw_init(struct msm_gpu *gpu) if (ret) goto out; - gpu_write(gpu, REG_A6XX_RBBM_SECVID_TRUST_CNTL, 0x0); + /* + * Try to load a zap shader into the secure world. If successful + * we can use the CP to switch out of secure mode. If not then we + * have no resource but to try to switch ourselves out manually. If we + * guessed wrong then access to the RBBM_SECVID_TRUST_CNTL register will + * be blocked and a permissions violation will soon follow. + */ + ret = a6xx_zap_shader_init(gpu); + if (!ret) { + OUT_PKT7(gpu->rb[0], CP_SET_SECURE_MODE, 1); + OUT_RING(gpu->rb[0], 0x00000000); + + a6xx_flush(gpu, gpu->rb[0]); + if (!a6xx_idle(gpu, gpu->rb[0])) + return -EINVAL; + } else { + /* Print a warning so if we die, we know why */ + dev_warn_once(gpu->dev->dev, + "Zap shader not enabled - using SECVID_TRUST_CNTL instead\n"); + gpu_write(gpu, REG_A6XX_RBBM_SECVID_TRUST_CNTL, 0x0); + } out: /* diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 714ed65..ead5f6a 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -155,6 +155,7 @@ static const struct adreno_info gpulist[] = { .gmem = SZ_1M, .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a6xx_gpu_init, + .zapfw = "a630_zap.mdt", }, };