From patchwork Thu Mar 28 20:16:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10875795 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 99F33186D for ; Thu, 28 Mar 2019 19:51:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8490C28E4A for ; Thu, 28 Mar 2019 19:51:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7943E28E56; Thu, 28 Mar 2019 19:51:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2F37B28E4A for ; Thu, 28 Mar 2019 19:51:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4365A6E828; Thu, 28 Mar 2019 19:51:37 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id A26346E81A; Thu, 28 Mar 2019 19:51:12 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 12:51:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,281,1549958400"; d="scan'208";a="138247634" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.134]) by fmsmga007.fm.intel.com with ESMTP; 28 Mar 2019 12:51:09 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [v7 09/16] drm/i915: Add plane color capabilities Date: Fri, 29 Mar 2019 01:46:07 +0530 Message-Id: <1553804174-2651-10-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1553804174-2651-1-git-send-email-uma.shankar@intel.com> References: <1553804174-2651-1-git-send-email-uma.shankar@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, emil.l.velikov@gmail.com, Uma Shankar , maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add Plane color capabilties, support for degamma and gamma added. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/intel_color.c | 12 +++++------- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_drv.h | 3 ++- drivers/gpu/drm/i915/intel_sprite.c | 11 +++++++++-- 4 files changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index b56c3999..afb1d00 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -930,7 +930,8 @@ int intel_color_check(struct intel_crtc_state *crtc_state) return 0; } -void intel_plane_color_init(struct drm_plane *plane) +void intel_plane_color_init(struct drm_plane *plane, u32 degamma_lut_size, + u32 gamma_lut_size) { struct drm_i915_private *dev_priv = to_i915(plane->dev); @@ -941,12 +942,9 @@ void intel_plane_color_init(struct drm_plane *plane) drm_plane_color_create_prop(plane->dev, plane); /* Enable color management support when we have degamma or gamma LUTs. */ - if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 || - INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0) - drm_plane_enable_color_mgmt(plane, - INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size, - true, - INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size); + if (degamma_lut_size != 0 || gamma_lut_size != 0) + drm_plane_enable_color_mgmt(plane, degamma_lut_size, + true, gamma_lut_size); } void intel_color_init(struct intel_crtc *crtc) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2775c3f..fc43c37 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14413,8 +14413,8 @@ static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv, supported_rotations); /* Add Plane Color properties */ - if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) - intel_plane_color_init(&plane->base); + if (IS_BROADWELL(dev_priv)) + intel_plane_color_init(&plane->base, 0, 16); drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a17e6a4..3a68191 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -2544,7 +2544,8 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ int intel_color_check(struct intel_crtc_state *crtc_state); void intel_color_commit(const struct intel_crtc_state *crtc_state); void intel_color_load_luts(const struct intel_crtc_state *crtc_state); -void intel_plane_color_init(struct drm_plane *plane); +void intel_plane_color_init(struct drm_plane *plane, u32 degamma_lut_size, + u32 gamma_lut_size); void intel_color_load_plane_luts(const struct drm_plane_state *plane_state); /* intel_lspcon.c */ diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 766e03e..41fdc12 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -2334,8 +2334,15 @@ struct intel_plane * BIT(DRM_MODE_BLEND_COVERAGE)); /* Add Plane Color properties */ - if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) - intel_plane_color_init(&plane->base); + if (INTEL_GEN(dev_priv) <= 10) + intel_plane_color_init(&plane->base, 0, 16); + + if (INTEL_GEN(dev_priv) >= 11) { + if (icl_is_hdr_plane(dev_priv, plane_id)) + intel_plane_color_init(&plane->base, 128, 33); + else + intel_plane_color_init(&plane->base, 33, 33); + } drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);