| Message ID | 1554279389-27377-3-git-send-email-yannick.fertre@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add supply property for DSI controller | expand |
On 4/3/19 10:16 AM, Yannick Fertré wrote: > Add support of an optional regulator for the phy part of the DSI > controller. > > Signed-off-by: Yannick Fertré <yannick.fertre@st.com> > --- > drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > index a672b59..84703d0 100644 > --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > @@ -9,6 +9,7 @@ > #include <linux/clk.h> > #include <linux/iopoll.h> > #include <linux/module.h> > +#include <linux/regulator/consumer.h> > #include <drm/drmP.h> > #include <drm/drm_mipi_dsi.h> > #include <drm/bridge/dw_mipi_dsi.h> > @@ -76,6 +77,7 @@ struct dw_mipi_dsi_stm { > u32 hw_version; > int lane_min_kbps; > int lane_max_kbps; > + struct regulator *vdd_supply; > }; > > static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) > @@ -318,16 +320,32 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev) > return PTR_ERR(dsi->base); > } > > + dsi->vdd_supply = devm_regulator_get_optional(dev, "phy-dsi"); > + if (IS_ERR(dsi->vdd_supply)) { > + ret = PTR_ERR(dsi->vdd_supply); > + if (ret != -EPROBE_DEFER) > + dev_err(dev, "failed to request regulator: %d\n", ret); > + return ret; > + } > + > + ret = regulator_enable(dsi->vdd_supply); > + if (ret) { > + dev_err(dev, "failed to enable regulator: %d\n", ret); > + return ret; > + } > + > dsi->pllref_clk = devm_clk_get(dev, "ref"); > if (IS_ERR(dsi->pllref_clk)) { > ret = PTR_ERR(dsi->pllref_clk); > dev_err(dev, "Unable to get pll reference clock: %d\n", ret); > + regulator_disable(dsi->vdd_supply); > return ret; > } > > ret = clk_prepare_enable(dsi->pllref_clk); > if (ret) { > dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__); > + regulator_disable(dsi->vdd_supply); > return ret; > } > > @@ -339,6 +357,7 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev) > dsi->dsi = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data); > if (IS_ERR(dsi->dsi)) { > DRM_ERROR("Failed to initialize mipi dsi host\n"); > + regulator_disable(dsi->vdd_supply); > clk_disable_unprepare(dsi->pllref_clk); > return PTR_ERR(dsi->dsi); > } > @@ -351,6 +370,7 @@ static int dw_mipi_dsi_stm_remove(struct platform_device *pdev) > struct dw_mipi_dsi_stm *dsi = platform_get_drvdata(pdev); > > clk_disable_unprepare(dsi->pllref_clk); > + regulator_disable(dsi->vdd_supply); Dear Yannick, Acked-by: Philippe Cornu <philippe.cornu@st.com> Philippe > dw_mipi_dsi_remove(dsi->dsi); > > return 0; >
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c index a672b59..84703d0 100644 --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c @@ -9,6 +9,7 @@ #include <linux/clk.h> #include <linux/iopoll.h> #include <linux/module.h> +#include <linux/regulator/consumer.h> #include <drm/drmP.h> #include <drm/drm_mipi_dsi.h> #include <drm/bridge/dw_mipi_dsi.h> @@ -76,6 +77,7 @@ struct dw_mipi_dsi_stm { u32 hw_version; int lane_min_kbps; int lane_max_kbps; + struct regulator *vdd_supply; }; static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) @@ -318,16 +320,32 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev) return PTR_ERR(dsi->base); } + dsi->vdd_supply = devm_regulator_get_optional(dev, "phy-dsi"); + if (IS_ERR(dsi->vdd_supply)) { + ret = PTR_ERR(dsi->vdd_supply); + if (ret != -EPROBE_DEFER) + dev_err(dev, "failed to request regulator: %d\n", ret); + return ret; + } + + ret = regulator_enable(dsi->vdd_supply); + if (ret) { + dev_err(dev, "failed to enable regulator: %d\n", ret); + return ret; + } + dsi->pllref_clk = devm_clk_get(dev, "ref"); if (IS_ERR(dsi->pllref_clk)) { ret = PTR_ERR(dsi->pllref_clk); dev_err(dev, "Unable to get pll reference clock: %d\n", ret); + regulator_disable(dsi->vdd_supply); return ret; } ret = clk_prepare_enable(dsi->pllref_clk); if (ret) { dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__); + regulator_disable(dsi->vdd_supply); return ret; } @@ -339,6 +357,7 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev) dsi->dsi = dw_mipi_dsi_probe(pdev, &dw_mipi_dsi_stm_plat_data); if (IS_ERR(dsi->dsi)) { DRM_ERROR("Failed to initialize mipi dsi host\n"); + regulator_disable(dsi->vdd_supply); clk_disable_unprepare(dsi->pllref_clk); return PTR_ERR(dsi->dsi); } @@ -351,6 +370,7 @@ static int dw_mipi_dsi_stm_remove(struct platform_device *pdev) struct dw_mipi_dsi_stm *dsi = platform_get_drvdata(pdev); clk_disable_unprepare(dsi->pllref_clk); + regulator_disable(dsi->vdd_supply); dw_mipi_dsi_remove(dsi->dsi); return 0;
Add support of an optional regulator for the phy part of the DSI controller. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> --- drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)