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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=x23vJnRDmjtQJCyno+k0trfgn/Q6gh1JDJ4ny5d17aM=; b=edLPykXcfStuQqO0UZ+eSpczesYa24YsOxpYracsS5US7/fFIm2LDEnhtwOXWiNX0Osbep5hfMdQdWp5uz3akvVx4BYU2kdLg1L/sCqntNlxXg4O6NEfDY3KhaWOUnUvetGszO6TX4lqXfHJp9AUuypk2CLFIj3y+7li7JhY2SA= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Lowry.Li@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ayan Halder , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , nd Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Updates the device-tree doc about how to enable SMMU by devicetree. Signed-off-by: Lowry Li (Arm Technology China) Reviewed-by: Liviu Dudau --- Documentation/devicetree/bindings/display/arm,komeda.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt index 02b2265..b12c045 100644 --- a/Documentation/devicetree/bindings/display/arm,komeda.txt +++ b/Documentation/devicetree/bindings/display/arm,komeda.txt @@ -11,6 +11,10 @@ Required properties: - "pclk": for the APB interface clock - #address-cells: Must be 1 - #size-cells: Must be 0 +- iommus: configure the stream id to IOMMU, Must be configured if want to + enable iommu in display. for how to configure this node please reference + devicetree/bindings/iommu/arm,smmu-v3.txt, + devicetree/bindings/iommu/iommu.txt Required properties for sub-node: pipeline@nq Each device contains one or two pipeline sub-nodes (at least one), each @@ -44,6 +48,9 @@ Example: interrupts = <0 168 4>; clocks = <&dpu_mclk>, <&dpu_aclk>; clock-names = "mclk", "pclk"; + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>, + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>, + <&smmu 8>, <&smmu 9>; dp0_pipe0: pipeline@0 { clocks = <&fpgaosc2>, <&dpu_aclk>;