| Message ID | 1557753318-11218-1-git-send-email-yannick.fertre@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] drm/stm: ltdc: remove clk_round_rate comment | expand |
Dear Yannick, Acked-by: Philippe Cornu <philippe.cornu@st.com> Thank you, Philippe :-) On 5/13/19 3:15 PM, Yannick Fertré wrote: > Clk_round_rate returns rounded clock without changing > the hardware in any way. > This function couldn't replace set_rate/get_rate calls. > Todo comment has been removed & a new log inserted. > > Signed-off-by: Yannick Fertré <yannick.fertre@st.com> > --- > Changes in v2: > - Clk_enable & clk_disable are needed for the SOC STM32F7 > (not for STM32MP1). I return this part of the patch to make sure the > driver is compatible with all SOC STM32. > > drivers/gpu/drm/stm/ltdc.c | 8 +++----- > 1 file changed, 3 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c > index 97912e2..1104e78 100644 > --- a/drivers/gpu/drm/stm/ltdc.c > +++ b/drivers/gpu/drm/stm/ltdc.c > @@ -507,11 +507,6 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, > struct ltdc_device *ldev = crtc_to_ltdc(crtc); > int rate = mode->clock * 1000; > > - /* > - * TODO clk_round_rate() does not work yet. When ready, it can > - * be used instead of clk_set_rate() then clk_get_rate(). > - */ > - > clk_disable(ldev->pixel_clk); > if (clk_set_rate(ldev->pixel_clk, rate) < 0) { > DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate); > @@ -521,6 +516,9 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, > > adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; > > + DRM_DEBUG_DRIVER("requested clock %dkHz, adjusted clock %dkHz\n", > + mode->clock, adjusted_mode->clock); > + > return true; > } > > -- > 2.7.4 >
Le lun. 13 mai 2019 à 16:46, Philippe CORNU <philippe.cornu@st.com> a écrit : > > Dear Yannick, > > Acked-by: Philippe Cornu <philippe.cornu@st.com> > Applied on drm-misc-next, Benjamin > Thank you, > > Philippe :-) > > On 5/13/19 3:15 PM, Yannick Fertré wrote: > > Clk_round_rate returns rounded clock without changing > > the hardware in any way. > > This function couldn't replace set_rate/get_rate calls. > > Todo comment has been removed & a new log inserted. > > > > Signed-off-by: Yannick Fertré <yannick.fertre@st.com> > > --- > > Changes in v2: > > - Clk_enable & clk_disable are needed for the SOC STM32F7 > > (not for STM32MP1). I return this part of the patch to make sure the > > driver is compatible with all SOC STM32. > > > > drivers/gpu/drm/stm/ltdc.c | 8 +++----- > > 1 file changed, 3 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c > > index 97912e2..1104e78 100644 > > --- a/drivers/gpu/drm/stm/ltdc.c > > +++ b/drivers/gpu/drm/stm/ltdc.c > > @@ -507,11 +507,6 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, > > struct ltdc_device *ldev = crtc_to_ltdc(crtc); > > int rate = mode->clock * 1000; > > > > - /* > > - * TODO clk_round_rate() does not work yet. When ready, it can > > - * be used instead of clk_set_rate() then clk_get_rate(). > > - */ > > - > > clk_disable(ldev->pixel_clk); > > if (clk_set_rate(ldev->pixel_clk, rate) < 0) { > > DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate); > > @@ -521,6 +516,9 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, > > > > adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; > > > > + DRM_DEBUG_DRIVER("requested clock %dkHz, adjusted clock %dkHz\n", > > + mode->clock, adjusted_mode->clock); > > + > > return true; > > } > > > > -- > > 2.7.4 > > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 97912e2..1104e78 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -507,11 +507,6 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, struct ltdc_device *ldev = crtc_to_ltdc(crtc); int rate = mode->clock * 1000; - /* - * TODO clk_round_rate() does not work yet. When ready, it can - * be used instead of clk_set_rate() then clk_get_rate(). - */ - clk_disable(ldev->pixel_clk); if (clk_set_rate(ldev->pixel_clk, rate) < 0) { DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate); @@ -521,6 +516,9 @@ static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc, adjusted_mode->clock = clk_get_rate(ldev->pixel_clk) / 1000; + DRM_DEBUG_DRIVER("requested clock %dkHz, adjusted clock %dkHz\n", + mode->clock, adjusted_mode->clock); + return true; }
Clk_round_rate returns rounded clock without changing the hardware in any way. This function couldn't replace set_rate/get_rate calls. Todo comment has been removed & a new log inserted. Signed-off-by: Yannick Fertré <yannick.fertre@st.com> --- Changes in v2: - Clk_enable & clk_disable are needed for the SOC STM32F7 (not for STM32MP1). I return this part of the patch to make sure the driver is compatible with all SOC STM32. drivers/gpu/drm/stm/ltdc.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.7.4