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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=4k0tsDuLY8JMYmozcEqZWiNTFixIgotjIAW7rlLQa40=; b=icJFC+czZQIke0mpTYpL+8T2emDszHq2Wm8GvIseyZBRLn462mglaKiZldc06qbtoCQvf3ap0LQ0H8lKtx7wK7BE2Rj/vVYWPaeb7AcpYBMyxyW1K4oUl6MaVQNSGhyOm+Vbs2T1+5aplYod07zQ9qWxr+Y7izH9Rgx1HhMuP9o= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Lowry.Li@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ayan Halder , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , nd Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Besides clearing the input ID to zero, D71 compiz also has input enable bit in CU_INPUTx_CONTROL which need to be cleared. Signed-off-by: Lowry Li (Arm Technology China) Reviewed-by: James Qian Wang (Arm Technology China) --- drivers/gpu/drm/arm/display/komeda/d71/d71_component.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index 1135e38..f8846c6 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -435,8 +435,18 @@ static void d71_component_disable(struct komeda_component *c) malidp_write32(reg, BLK_CONTROL, 0); - for (i = 0; i < c->max_active_inputs; i++) + for (i = 0; i < c->max_active_inputs; i++) { malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0); + + /* Besides clearing the input ID to zero, D71 compiz also has + * input enable bit in CU_INPUTx_CONTROL which need to be + * cleared. + */ + if (has_bit(c->id, KOMEDA_PIPELINE_COMPIZS)) + malidp_write32(reg, CU_INPUT0_CONTROL + + i * CU_PER_INPUT_REGS * 4, + CU_INPUT_CTRL_ALPHA(0xFF)); + } } static void compiz_enable_input(u32 __iomem *id_reg,