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a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=01gwSFAYA3Uk4IeDNbVDz4hKTeRat6clKeRgvLpNlk8=; b=nOggFycEOQ4lxv/jIjiJjA+OgMu+qrclk2HNd0DgJGuepj5Zc8HW9f5Gut6xF8El9S3c0TqDtRaxG2fznnXZFzfXGyqW1mng+/hvLgaAz3C209a2bsHhMm5RA4qjzp9TQEiehyaCB/5Y/5Yf+Aj4SIwFohSCiuG67yOqm1Or3dc= X-Mailman-Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Lowry.Li@arm.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ayan Halder , "Jonathan Chai \(Arm Technology China\)" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "Julien Yin \(Arm Technology China\)" , nd Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Adds gamma and color-transform support for DOU-IPS. Adds two caps members fgamma_coeffs and ctm_coeffs to komeda_improc_state. If color management changed, set gamma and color-transform accordingly. This patch series depends on: - https://patchwork.freedesktop.org/series/58710/ - https://patchwork.freedesktop.org/series/59000/ - https://patchwork.freedesktop.org/series/59002/ - https://patchwork.freedesktop.org/series/59747/ - https://patchwork.freedesktop.org/series/59915/ - https://patchwork.freedesktop.org/series/60083/ - https://patchwork.freedesktop.org/series/60698/ - https://patchwork.freedesktop.org/series/60856/ - https://patchwork.freedesktop.org/series/60893/ Signed-off-by: Lowry Li (Arm Technology China) --- .../gpu/drm/arm/display/komeda/d71/d71_component.c | 24 ++++++++++++++++++++++ drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2 ++ .../gpu/drm/arm/display/komeda/komeda_pipeline.h | 3 +++ .../drm/arm/display/komeda/komeda_pipeline_state.c | 6 ++++++ 4 files changed, 35 insertions(+) diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c index 9668063..240f82c 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c @@ -882,15 +882,39 @@ static int d71_downscaling_clk_check(struct komeda_pipeline *pipe, static void d71_improc_update(struct komeda_component *c, struct komeda_component_state *state) { + struct drm_crtc_state *crtc_st = state->crtc->state; struct komeda_improc_state *st = to_improc_st(state); + struct d71_pipeline *pipe = to_d71_pipeline(c->pipeline); u32 __iomem *reg = c->reg; u32 index; + u32 mask = 0, ctrl = 0; for_each_changed_input(state, index) malidp_write32(reg, BLK_INPUT_ID0 + index * 4, to_d71_input_id(state, index)); malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize)); + + if (crtc_st->color_mgmt_changed) { + mask |= IPS_CTRL_FT | IPS_CTRL_RGB; + + if (crtc_st->gamma_lut) { + malidp_write_group(pipe->dou_ft_coeff_addr, FT_COEFF0, + KOMEDA_N_GAMMA_COEFFS, + st->fgamma_coeffs); + ctrl |= IPS_CTRL_FT; /* enable gamma */ + } + + if (crtc_st->ctm) { + malidp_write_group(reg, IPS_RGB_RGB_COEFF0, + KOMEDA_N_CTM_COEFFS, + st->ctm_coeffs); + ctrl |= IPS_CTRL_RGB; /* enable gamut */ + } + } + + if (mask) + malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl); } static void d71_improc_dump(struct komeda_component *c, struct seq_file *sf) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index 24a9613..18c23f8 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -573,6 +573,8 @@ static int komeda_crtc_add(struct komeda_kms_dev *kms, if (err) return err; + drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE); + return 0; } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h index 49bb058..989408b 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h @@ -11,6 +11,7 @@ #include #include #include "malidp_utils.h" +#include "komeda_color_mgmt.h" #define KOMEDA_MAX_PIPELINES 2 #define KOMEDA_PIPELINE_MAX_LAYERS 4 @@ -313,6 +314,8 @@ struct komeda_improc { struct komeda_improc_state { struct komeda_component_state base; u16 hsize, vsize; + u32 fgamma_coeffs[KOMEDA_N_GAMMA_COEFFS]; + u32 ctm_coeffs[KOMEDA_N_CTM_COEFFS]; }; /* display timing controller */ diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c index afb2301..82ea6cf 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c @@ -700,6 +700,12 @@ void pipeline_composition_size(struct komeda_crtc_state *kcrtc_st, st->hsize = dflow->in_w; st->vsize = dflow->in_h; + if (kcrtc_st->base.color_mgmt_changed) { + drm_lut_to_fgamma_coeffs(kcrtc_st->base.gamma_lut, + st->fgamma_coeffs); + drm_ctm_to_coeffs(kcrtc_st->base.ctm, st->ctm_coeffs); + } + komeda_component_add_input(&st->base, &dflow->input, 0); komeda_component_set_output(&dflow->input, &improc->base, 0);