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[v2,2/2] dt/bindings: drm/komeda: Adds SMMU support for D71 devicetree

Message ID 1559814765-18455-3-git-send-email-lowry.li@arm.com (mailing list archive)
State New, archived
Headers show
Series drm/komeda: Add SMMU support on Komeda driver | expand

Commit Message

Lowry Li (Arm Technology China) June 6, 2019, 9:53 a.m. UTC 
Updates the device-tree doc about how to enable SMMU by devicetree.

Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com>

---
 Documentation/devicetree/bindings/display/arm,komeda.txt | 7 +++++++
 1 file changed, 7 insertions(+)
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Patch

diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
index 02b2265..b12c045 100644
--- a/Documentation/devicetree/bindings/display/arm,komeda.txt
+++ b/Documentation/devicetree/bindings/display/arm,komeda.txt
@@ -11,6 +11,10 @@  Required properties:
       - "pclk": for the APB interface clock
 - #address-cells: Must be 1
 - #size-cells: Must be 0
+- iommus: configure the stream id to IOMMU, Must be configured if want to
+    enable iommu in display. for how to configure this node please reference
+        devicetree/bindings/iommu/arm,smmu-v3.txt,
+        devicetree/bindings/iommu/iommu.txt
 
 Required properties for sub-node: pipeline@nq
 Each device contains one or two pipeline sub-nodes (at least one), each
@@ -44,6 +48,9 @@  Example:
 		interrupts = <0 168 4>;
 		clocks = <&dpu_mclk>, <&dpu_aclk>;
 		clock-names = "mclk", "pclk";
+		iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+			<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+			<&smmu 8>, <&smmu 9>;
 
 		dp0_pipe0: pipeline@0 {
 			clocks = <&fpgaosc2>, <&dpu_aclk>;