From patchwork Fri Dec 6 09:52:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Palcu X-Patchwork-Id: 11275889 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A50FD138C for ; Fri, 6 Dec 2019 09:59:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8CFA020659 for ; Fri, 6 Dec 2019 09:59:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8CFA020659 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E36D16F99F; Fri, 6 Dec 2019 09:59:36 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9A9DF6F9A0 for ; Fri, 6 Dec 2019 09:59:35 +0000 (UTC) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4F905200995; Fri, 6 Dec 2019 10:53:24 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 41B46201668; Fri, 6 Dec 2019 10:53:24 +0100 (CET) Received: from fsr-ub1664-121.ea.freescale.net (fsr-ub1664-121.ea.freescale.net [10.171.82.171]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 8890720395; Fri, 6 Dec 2019 10:53:23 +0100 (CET) From: Laurentiu Palcu To: Philipp Zabel , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v3 3/4] dt-bindings: display: imx: add bindings for DCSS Date: Fri, 6 Dec 2019 11:52:40 +0200 Message-Id: <1575625964-27102-4-git-send-email-laurentiu.palcu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575625964-27102-1-git-send-email-laurentiu.palcu@nxp.com> References: <1575625964-27102-1-git-send-email-laurentiu.palcu@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, agx@sigxcpu.org, lukas@mntmn.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Laurentiu Palcu , linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add bindings for iMX8MQ Display Controller Subsystem. Signed-off-by: Laurentiu Palcu Reviewed-by: Rob Herring --- .../bindings/display/imx/nxp,imx8mq-dcss.yaml | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 00000000..efd2494 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: iMX8MQ Display Controller Subsystem (DCSS) + +maintainers: + - Laurentiu Palcu + +description: + + The DCSS (display controller sub system) is used to source up to three + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 + image processing capabilities are included to provide a solution capable of + driving next generation high dynamic range displays. + +properties: + compatible: + const: nxp,imx8mq-dcss + + reg: + maxItems: 2 + + interrupts: + maxItems: 3 + items: + - description: Context loader completion and error interrupt + - description: DTG interrupt used to signal context loader trigger time + - description: DTG interrupt for Vblank + + interrupt-names: + maxItems: 3 + items: + - const: ctx_ld + - const: ctxld_kick + - const: vblank + + clocks: + maxItems: 5 + items: + - description: Display APB clock for all peripheral PIO access interfaces + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL + - description: RTRAM clock + - description: Pixel clock, can be driver either by HDMI phy clock or MIPI + - description: DTRC clock, needed by video decompressor + + clock-names: + items: + - const: apb + - const: axi + - const: rtrm + - const: pix + - const: dtrc + + port@0: + type: object + description: A port node pointing to a hdmi_in or mipi_in port node. + +examples: + - | + dcss: display-controller@32e00000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctx_ld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk 248>, <&clk 247>, <&clk 249>, + <&clk 254>,<&clk 122>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>; + assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>; + assigned-clock-rates = <800000000>, + <400000000>; + port@0 { + dcss_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; +