diff mbox series

[48/59] drm/kmb: SWAP R and B LCD Layer order

Message ID 1593552491-23698-49-git-send-email-anitha.chrisanthus@intel.com (mailing list archive)
State New, archived
Headers show
Series Add support for Keem Bay DRM driver | expand

Commit Message

Chrisanthus, Anitha June 30, 2020, 9:28 p.m. UTC 
Set swap bit for the colors to display correctly
when the format is RGB and not set when its BGR.

Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
 drivers/gpu/drm/kmb/kmb_plane.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/kmb/kmb_plane.c b/drivers/gpu/drm/kmb/kmb_plane.c
index d87a3a2..9f9ae57 100644
--- a/drivers/gpu/drm/kmb/kmb_plane.c
+++ b/drivers/gpu/drm/kmb/kmb_plane.c
@@ -218,54 +218,55 @@  unsigned int set_pixel_format(u32 format)
 		val = LCD_LAYER_FORMAT_NV12 | LCD_LAYER_PLANAR_STORAGE
 		    | LCD_LAYER_CRCB_ORDER;
 		break;
-		/* packed formats */
+	/* packed formats */
+	/* looks hw requires B & G to be swapped when RGB */
 	case DRM_FORMAT_RGB332:
-		val = LCD_LAYER_FORMAT_RGB332;
+		val = LCD_LAYER_FORMAT_RGB332 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_XBGR4444:
-		val = LCD_LAYER_FORMAT_RGBX4444 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGBX4444;
 		break;
 	case DRM_FORMAT_ARGB4444:
-		val = LCD_LAYER_FORMAT_RGBA4444;
+		val = LCD_LAYER_FORMAT_RGBA4444 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_ABGR4444:
-		val = LCD_LAYER_FORMAT_RGBA4444 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGBA4444;
 		break;
 	case DRM_FORMAT_XRGB1555:
-		val = LCD_LAYER_FORMAT_XRGB1555;
+		val = LCD_LAYER_FORMAT_XRGB1555 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_XBGR1555:
-		val = LCD_LAYER_FORMAT_XRGB1555 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_XRGB1555;
 		break;
 	case DRM_FORMAT_ARGB1555:
-		val = LCD_LAYER_FORMAT_RGBA1555;
+		val = LCD_LAYER_FORMAT_RGBA1555 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_ABGR1555:
-		val = LCD_LAYER_FORMAT_RGBA1555 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGBA1555;
 		break;
 	case DRM_FORMAT_RGB565:
-		val = LCD_LAYER_FORMAT_RGB565;
+		val = LCD_LAYER_FORMAT_RGB565 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_BGR565:
-		val = LCD_LAYER_FORMAT_RGB565 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGB565;
 		break;
 	case DRM_FORMAT_RGB888:
-		val = LCD_LAYER_FORMAT_RGB888;
+		val = LCD_LAYER_FORMAT_RGB888 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_BGR888:
-		val = LCD_LAYER_FORMAT_RGB888 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGB888;
 		break;
 	case DRM_FORMAT_XRGB8888:
-		val = LCD_LAYER_FORMAT_RGBX8888;
+		val = LCD_LAYER_FORMAT_RGBX8888 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_XBGR8888:
-		val = LCD_LAYER_FORMAT_RGBX8888 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGBX8888;
 		break;
 	case DRM_FORMAT_ARGB8888:
-		val = LCD_LAYER_FORMAT_RGBA8888;
+		val = LCD_LAYER_FORMAT_RGBA8888 | LCD_LAYER_BGR_ORDER;
 		break;
 	case DRM_FORMAT_ABGR8888:
-		val = LCD_LAYER_FORMAT_RGBA8888 | LCD_LAYER_BGR_ORDER;
+		val = LCD_LAYER_FORMAT_RGBA8888;
 		break;
 	}
 	DRM_INFO("%s : %d layer format val=%d\n", __func__, __LINE__, val);
@@ -370,7 +371,6 @@  static void kmb_plane_atomic_update(struct drm_plane *plane,
 	val |= set_bits_per_pixel(fb->format);
 	/*CHECKME Leon drvr sets it to 100 try this for now */
 	val |= LCD_LAYER_FIFO_100;
-	val |= LCD_LAYER_BGR_ORDER;
 	kmb_write_lcd(dev_p, LCD_LAYERn_CFG(plane_id), val);
 
 	/*re-initialize interrupts */