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DIR:OUT; SFP:1101; X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Sep 2020 12:48:45.7438 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 781ffe31-1278-4659-aaaa-08d858ac84d1 X-MS-Exchange-CrossTenant-Id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=d36035c5-6ce6-4662-a3dc-e762e61ae4c9; Ip=[158.140.1.147]; Helo=[sjmaillnx1.cadence.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM12FT059.eop-nam12.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR07MB6372 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-14_03:2020-09-14, 2020-09-14 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 phishscore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 malwarescore=0 mlxscore=0 suspectscore=0 bulkscore=0 adultscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2009140103 X-Mailman-Approved-At: Tue, 15 Sep 2020 07:07:18 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mparab@cadence.com, yamonkar@cadence.com, praneeth@ti.com, nsekhar@ti.com, jsarha@ti.com, tomi.valkeinen@ti.com, sjakhade@cadence.com, nikhil.nd@ti.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Yuti Amonkar Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in yaml format. Signed-off-by: Yuti Amonkar Signed-off-by: Swapnil Jakhade Reviewed-by: Rob Herring Reviewed-by: Laurent Pinchart --- .../display/bridge/cdns,mhdp8546.yaml | 154 ++++++++++++++++++ 1 file changed, 154 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml new file mode 100644 index 000000000000..a21a4bfe15cf --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -0,0 +1,154 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence MHDP8546 bridge + +maintainers: + - Swapnil Jakhade + - Yuti Amonkar + +properties: + compatible: + enum: + - cdns,mhdp8546 + - ti,j721e-mhdp8546 + + reg: + minItems: 1 + maxItems: 2 + items: + - description: + Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). + The AUX and PMA registers are not part of this range, they are instead + included in the associated PHY. + - description: + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. + + reg-names: + minItems: 1 + maxItems: 2 + items: + - const: mhdptx + - const: j721e-intg + + clocks: + maxItems: 1 + description: + DP bridge clock, used by the IP to know how to translate a number of + clock cycles into a time (which is used to comply with DP standard timings + and delays). + + phys: + maxItems: 1 + description: + phandle to the DisplayPort PHY. + + ports: + type: object + description: + Ports as described in Documentation/devicetree/bindings/graph.txt. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + type: object + description: + First input port representing the DP bridge input. + + port@1: + type: object + description: + Second input port representing the DP bridge input. + + port@2: + type: object + description: + Third input port representing the DP bridge input. + + port@3: + type: object + description: + Fourth input port representing the DP bridge input. + + port@4: + type: object + description: + Output port representing the DP bridge output. + + required: + - port@0 + - port@4 + - '#address-cells' + - '#size-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-mhdp8546 + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + +required: + - compatible + - clocks + - reg + - reg-names + - phys + - ports + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + mhdp: dp-bridge@f0fb000000 { + compatible = "cdns,mhdp8546"; + reg = <0xf0 0xfb000000 0x0 0x1000000>; + reg-names = "mhdptx"; + clocks = <&mhdp_clock>; + phys = <&dp_phy>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_bridge_input: endpoint { + remote-endpoint = <&xxx_dpi_output>; + }; + }; + + port@4 { + reg = <4>; + dp_bridge_output: endpoint { + remote-endpoint = <&xxx_dp_connector_input>; + }; + }; + }; + }; + }; +...