From patchwork Wed Dec 23 20:27:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Wahren X-Patchwork-Id: 11988869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4979AC433DB for ; Wed, 23 Dec 2020 20:37:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0BE492246B for ; Wed, 23 Dec 2020 20:37:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0BE492246B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=i2se.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A17356E894; Wed, 23 Dec 2020 20:37:09 +0000 (UTC) Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.17.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0436D89EF7 for ; Wed, 23 Dec 2020 20:37:02 +0000 (UTC) Received: from localhost.localdomain ([37.4.249.194]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MRmo8-1kTS3U0i30-00TCnc; Wed, 23 Dec 2020 21:27:54 +0100 From: Stefan Wahren To: Eric Anholt , Maxime Ripard , David Airlie , Daniel Vetter , Rob Herring , Nicolas Saenz Julienne Subject: [PATCH 3/4] drm/v3d: Don't clear MMU control bits on exception Date: Wed, 23 Dec 2020 21:27:24 +0100 Message-Id: <1608755245-18069-4-git-send-email-stefan.wahren@i2se.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> References: <1608755245-18069-1-git-send-email-stefan.wahren@i2se.com> X-Provags-ID: V03:K1:0tOEdDp6fR0bZbqYWT127G8PNcCAxolyfkayHeulx2DS57jbIDQ XlgCEGoOcHZIlmdGZG19UAOC3Q5kKIAhbXO8PxpaqyQwJzvnjDa5DG34KzCDO/LWNboNs8o 45M4mEJ3jiN/nOzDUKkiewC/zJ7Jv9vcrxAWL5UN4L9GDbhqY37XCKp02eQ6Tq3HeWdflqw r4e61G4wyZpYGuPvX0pWw== X-UI-Out-Filterresults: notjunk:1;V03:K0:8hey41wj3hA=:0ABkvrN8Sne3osctNhuVMi TwgG5unABreBslKwOtIbBUKTHh/gj6+bq4aqIHNOjxprTXx4psldci2rvajNMAjdzFMxYhV9I jS/7icG2durygwaADCcLSPLpZtIuG/qSXJQenNaZYM4uPvQO4zau2JDjNrxo0I987EwB3ie9K nRpHvVF7TUOxRezTIwQyR1CW46+RaOAfqAOGDI7+tDNDxAWLCxETz5UbCGZFme7WWBYn44mIb R7aIhWX41EeqikVuoZhyHqvkSpqaUsqYiyP/FN1gi2KpWTF3FLQnkkcGYyr01nxORYFKtZkx1 CQPjdMG3QZEk3KaIymI3nc1bgHpSC3+/UZHBozla7Fng0gBiy3JfBDtjFWirpQV5rK8OIZM1p 5pbBsKREiDQQl0PNmYGrIb47RJGXRePXuohXEiL5PDz2rv6tfdIPy/jV62sYuPEqWc27iQe5N vWK2u4tYJA== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Phil Elwell , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Phil Elwell MMU exception conditions are reported in the V3D_MMU_CTRL register as write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any exceptions, but does so by masking out any other bits and writing the result back. There are some important control bits in that register, including MMU_ENABLE, so a safer approach is to simply write back the value just read unaltered. Signed-off-by: Phil Elwell --- drivers/gpu/drm/v3d/v3d_irq.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c index 0be2eb7..e714d53 100644 --- a/drivers/gpu/drm/v3d/v3d_irq.c +++ b/drivers/gpu/drm/v3d/v3d_irq.c @@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg) }; const char *client = "?"; - V3D_WRITE(V3D_MMU_CTL, - V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED | - V3D_MMU_CTL_PT_INVALID | - V3D_MMU_CTL_WRITE_VIOLATION)); + V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); if (v3d->ver >= 41) { axi_id = axi_id >> 5;