From patchwork Wed Mar 16 17:35:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sankeerth Billakanti (QUIC)" X-Patchwork-Id: 12783015 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 563DBC433F5 for ; Wed, 16 Mar 2022 17:36:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7CFCD10E8EB; Wed, 16 Mar 2022 17:36:44 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFFE210E8EA; Wed, 16 Mar 2022 17:36:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647452203; x=1678988203; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=7NjOzSOcPGwwoD5QIu1bu+JxM1iFjfSzFCRR9ylUhJM=; b=dur7lCf1lbXe2WHGt/OtJLtcPr7Sv+eVR+dtzDht0mqAaqxSh+cq5udv xRvqn691AFbQJM50w3Znuj+AJehItcI9bAfPxhoblbkT3CIRk5NDXPPwZ UrUTwMKxQc5nZgwj+FuUhZYnulnsdA134buqjbT8S22uwGwiGtCaV/dbq Q=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 16 Mar 2022 10:36:42 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Mar 2022 10:36:41 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 10:36:41 -0700 Received: from sbillaka-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 10:36:33 -0700 From: Sankeerth Billakanti To: , , , , Subject: [PATCH v5 2/9] arm64: dts: qcom: sc7280: Add support for eDP panel on CRD Date: Wed, 16 Mar 2022 23:05:47 +0530 Message-ID: <1647452154-16361-3-git-send-email-quic_sbillaka@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1647452154-16361-1-git-send-email-quic_sbillaka@quicinc.com> References: <1647452154-16361-1-git-send-email-quic_sbillaka@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: quic_kalyant@quicinc.com, Sankeerth Billakanti , dianders@chromium.org, bjorn.andersson@linaro.org, quic_vproddut@quicinc.com, airlied@linux.ie, sam@ravnborg.org, quic_abhinavk@quicinc.com, robh+dt@kernel.org, swboyd@chromium.org, agross@kernel.org, seanpaul@chromium.org, dmitry.baryshkov@linaro.org, thierry.reding@gmail.com, krzk+dt@kernel.org, quic_khsieh@quicinc.com, sean@poorly.run Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Enable support for eDP interface via aux_bus on CRD platform. Signed-off-by: Sankeerth Billakanti --- Changes in v5: - Change the order of patches - Remove the backlight nodes - Remove the bias setting - Fix compilation issue - Model VREG_EDP_BP for backlight power Changes in v4: - Create new patch for name changes - Remove output-low Changes in v3: - Sort the nodes alphabetically - Use - instead of _ as node names - Place the backlight and panel nodes under root - Change the name of edp_out to mdss_edp_out - Change the names of regulator nodes - Delete unused properties in the board file Changes in v2: - Sort node references alphabetically - Improve readability - Move the pwm pinctrl to pwm node - Move the regulators to root - Define backlight power - Remove dummy regulator node - Cleanup pinctrl definitions arch/arm64/boot/dts/qcom/sc7280-crd.dts | 93 +++++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts index e2efbdd..2df654e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include "sc7280-idp.dtsi" #include "sc7280-idp-ec-h1.dtsi" @@ -21,6 +22,27 @@ chosen { stdout-path = "serial0:115200n8"; }; + + edp_3v3_regulator: edp-3v3-regulator { + compatible = "regulator-fixed"; + regulator-name = "edp_3v3_regulator"; + + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&edp_panel_power>; + }; + + vreg_edp_bp: vreg-edp-bp-regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_edp_bp"; + regulator-always-on; + regulator-boot-on; + }; }; &apps_rsc { @@ -76,6 +98,58 @@ ap_ts_pen_1v8: &i2c13 { }; }; +&mdss { + status = "okay"; +}; + +&mdss_dp { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&dp_hot_plug_det>; + data-lanes = <0 1>; + vdda-1p2-supply = <&vreg_l6b_1p2>; + vdda-0p9-supply = <&vreg_l1b_0p8>; +}; + +&mdss_edp { + status = "okay"; + + data-lanes = <0 1 2 3>; + vdda-1p2-supply = <&vreg_l6b_1p2>; + vdda-0p9-supply = <&vreg_l10c_0p8>; + + aux-bus { + edp_panel: edp-panel { + compatible = "edp-panel"; + + power-supply = <&edp_3v3_regulator>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + edp_panel_in: endpoint { + remote-endpoint = <&mdss_edp_out>; + }; + }; + }; + }; + }; +}; + +&mdss_edp_out { + remote-endpoint = <&edp_panel_in>; +}; + +&mdss_edp_phy { + status = "okay"; +}; + +&mdss_mdp { + status = "okay"; +}; + &nvme_3v3_regulator { gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; }; @@ -84,7 +158,26 @@ ap_ts_pen_1v8: &i2c13 { pins = "gpio51"; }; +&pm8350c_gpios { + edp_bl_power: edp-bl-power { + pins = "gpio7"; + function = "normal"; + qcom,drive-strength = ; + }; + + edp_bl_pwm: edp-bl-pwm { + pins = "gpio8"; + function = "func1"; + qcom,drive-strength = ; + }; +}; + &tlmm { + edp_panel_power: edp-panel-power { + pins = "gpio80"; + function = "gpio"; + }; + tp_int_odl: tp-int-odl { pins = "gpio7"; function = "gpio";