From patchwork Wed Jun 24 06:22:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Spelvin X-Patchwork-Id: 6671641 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E64F2C05AC for ; Thu, 25 Jun 2015 01:31:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 261C920555 for ; Thu, 25 Jun 2015 01:31:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A261520557 for ; Thu, 25 Jun 2015 01:31:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E28D6E61D; Wed, 24 Jun 2015 18:31:53 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from ns.horizon.com (ns.horizon.com [71.41.210.147]) by gabe.freedesktop.org (Postfix) with SMTP id 2AFDC6E42C for ; Tue, 23 Jun 2015 23:22:49 -0700 (PDT) Received: (qmail 6078 invoked by uid 1000); 24 Jun 2015 02:22:47 -0400 Date: 24 Jun 2015 02:22:47 -0400 Message-ID: <20150624062247.6077.qmail@ns.horizon.com> From: "George Spelvin" To: bskeggs@redhat.com Subject: Re: [[RFC PATCH] Trim 1204 bytes from gm204_grctx_generate_405b60 stack frame In-Reply-To: <20150618081018.5799.qmail@ns.horizon.com> X-Mailman-Approved-At: Wed, 24 Jun 2015 18:31:48 -0700 Cc: dri-devel@lists.freedesktop.org, linux@horizon.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This function keeps causing the kernel build to whine at me about its 1200 byte stack frame. (TPC_MAC = 8 * GPC_MAX = 8 * 32 = 256) The following generates the same nv_wr32() operations in the same order as the original, but without the 256-word dist[] array. (I'm not sure if 4-bit fields inside the dist bytes can accomodate priv->gpc_nr greater than 16, so the other arrays could have halved in size, too, but that's a separate issue.) I don't have the necessary hardware to test this, but would someone mind doing so? (If you want to declare *priv const while you're at it, I'm not likely to object.) Signed-off-by: George Spelvin --- drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c index ea8e6615..00aa4a8b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm204.c @@ -946,8 +946,7 @@ gm204_grctx_generate_rop_active_fbps(struct gf100_gr_priv *priv) static void gm204_grctx_generate_405b60(struct gf100_gr_priv *priv) { - const u32 dist_nr = DIV_ROUND_UP(priv->tpc_total, 4); - u32 dist[TPC_MAX] = {}; + u32 dist = 0; u32 gpcs[GPC_MAX] = {}; u8 tpcnr[GPC_MAX]; int tpc, gpc, i; @@ -964,12 +963,16 @@ gm204_grctx_generate_405b60(struct gf100_gr_priv *priv) } while(!tpcnr[gpc]); tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--; - dist[i / 4] |= ((gpc << 4) | tpc) << ((i % 4) * 8); + dist |= ((gpc << 4) | tpc) << ((i % 4) * 8); + if ((i % 4) == 3) { + nv_wr32(priv, 0x405b60 + i - 3, dist); + dist = 0; + } gpcs[gpc] |= i << (tpc * 8); } + if (i % 4) + nv_wr32(priv, 0x405b60 + round_down(i, 4), dist); - for (i = 0; i < dist_nr; i++) - nv_wr32(priv, 0x405b60 + (i * 4), dist[i]); for (i = 0; i < priv->gpc_nr; i++) nv_wr32(priv, 0x405ba0 + (i * 4), gpcs[i]); }