| Message ID | 20160831081817.5191-4-maxime.ripard@free-electrons.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > The A10-EVB from Allwinner comes with an unidentified panel, with the only > mark on the PCB being A10-SUB-EVB-5LCD. > > Add timings to simple panel to handle it. > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > --- > drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c > index 85143d1b9b31..be371b053aab 100644 > --- a/drivers/gpu/drm/panel/panel-simple.c > +++ b/drivers/gpu/drm/panel/panel-simple.c > @@ -386,6 +386,29 @@ static void panel_simple_shutdown(struct device *dev) > panel_simple_disable(&panel->base); > } > > +static const struct drm_display_mode allwinner_a10_sub_evb_5lcd_mode = { > + .clock = 33000, > + .hdisplay = 800, > + .hsync_start = 800 + 209, > + .hsync_end = 800 + 209 + 1, > + .htotal = 800 + 209 + 1 + 45, > + .vdisplay = 480, > + .vsync_start = 480 + 22, > + .vsync_end = 480 + 22 + 1, > + .vtotal = 480 + 22 + 1 + 22, > + .vrefresh = 60, I assume the numbers came from the fex file? Allwinner LCD timing numbers aren't very precise. This seems to yield a refresh rate of 58.x Hz. The dot clock can go below MHz resolution, so it should be possible to set it to a more proper clock rate here. ChenYu > +}; > + > +static const struct panel_desc allwinner_a10_sub_evb_5lcd = { > + .modes = &allwinner_a10_sub_evb_5lcd_mode, > + .num_modes = 1, > + .size = { > + .width = 110, > + .height = 67, > + }, > + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, > +}; > + > static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { > .clock = 33333, > .hdisplay = 800, > @@ -1515,6 +1538,9 @@ static const struct panel_desc urt_umsh_8596md_parallel = { > > static const struct of_device_id platform_of_match[] = { > { > + .compatible = "allwinner,sun4i-a10-sub-evb-5-lcd", > + .data = &allwinner_a10_sub_evb_5lcd, > + }, { > .compatible = "ampire,am800480r3tmqwa1h", > .data = &ire_am800480r3tmqwa1h, > }, { > -- > 2.9.2 >
Hi, On Mon, Sep 05, 2016 at 10:00:01PM +0800, Chen-Yu Tsai wrote: > On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard > <maxime.ripard@free-electrons.com> wrote: > > The A10-EVB from Allwinner comes with an unidentified panel, with the only > > mark on the PCB being A10-SUB-EVB-5LCD. > > > > Add timings to simple panel to handle it. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > --- > > drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ > > 1 file changed, 26 insertions(+) > > > > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c > > index 85143d1b9b31..be371b053aab 100644 > > --- a/drivers/gpu/drm/panel/panel-simple.c > > +++ b/drivers/gpu/drm/panel/panel-simple.c > > @@ -386,6 +386,29 @@ static void panel_simple_shutdown(struct device *dev) > > panel_simple_disable(&panel->base); > > } > > > > +static const struct drm_display_mode allwinner_a10_sub_evb_5lcd_mode = { > > + .clock = 33000, > > + .hdisplay = 800, > > + .hsync_start = 800 + 209, > > + .hsync_end = 800 + 209 + 1, > > + .htotal = 800 + 209 + 1 + 45, > > + .vdisplay = 480, > > + .vsync_start = 480 + 22, > > + .vsync_end = 480 + 22 + 1, > > + .vtotal = 480 + 22 + 1 + 22, > > + .vrefresh = 60, > > I assume the numbers came from the fex file? Allwinner LCD timing numbers > aren't very precise. This seems to yield a refresh rate of 58.x Hz. > The dot clock can go below MHz resolution, so it should be possible > to set it to a more proper clock rate here. Indeed. Upon closer inspection, it seems (from the ribbon) that the display is an hannstar, but there's no screen reference anywhere. By looking into it using the available references, the date of production found on that panel, and so on, it seems like it is an HSD050IDW1-A, whose timings do not seem to far off. But it's pure speculation at this point. Maxime
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 85143d1b9b31..be371b053aab 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -386,6 +386,29 @@ static void panel_simple_shutdown(struct device *dev) panel_simple_disable(&panel->base); } +static const struct drm_display_mode allwinner_a10_sub_evb_5lcd_mode = { + .clock = 33000, + .hdisplay = 800, + .hsync_start = 800 + 209, + .hsync_end = 800 + 209 + 1, + .htotal = 800 + 209 + 1 + 45, + .vdisplay = 480, + .vsync_start = 480 + 22, + .vsync_end = 480 + 22 + 1, + .vtotal = 480 + 22 + 1 + 22, + .vrefresh = 60, +}; + +static const struct panel_desc allwinner_a10_sub_evb_5lcd = { + .modes = &allwinner_a10_sub_evb_5lcd_mode, + .num_modes = 1, + .size = { + .width = 110, + .height = 67, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, +}; + static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { .clock = 33333, .hdisplay = 800, @@ -1515,6 +1538,9 @@ static const struct panel_desc urt_umsh_8596md_parallel = { static const struct of_device_id platform_of_match[] = { { + .compatible = "allwinner,sun4i-a10-sub-evb-5-lcd", + .data = &allwinner_a10_sub_evb_5lcd, + }, { .compatible = "ampire,am800480r3tmqwa1h", .data = &ire_am800480r3tmqwa1h, }, {
The A10-EVB from Allwinner comes with an unidentified panel, with the only mark on the PCB being A10-SUB-EVB-5LCD. Add timings to simple panel to handle it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> --- drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)