From patchwork Mon Jan 23 21:09:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 9533505 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6138C60434 for ; Mon, 23 Jan 2017 21:11:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5334127CFC for ; Mon, 23 Jan 2017 21:11:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 47EB1283FD; Mon, 23 Jan 2017 21:11:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DEBA327CFC for ; Mon, 23 Jan 2017 21:11:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E68CB6E64C; Mon, 23 Jan 2017 21:10:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id F029B6E625; Mon, 23 Jan 2017 21:10:41 +0000 (UTC) Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8126881252; Mon, 23 Jan 2017 21:10:42 +0000 (UTC) Received: from shalem.localdomain.com (ovpn-116-98.ams2.redhat.com [10.36.116.98]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v0NLA0eh025633; Mon, 23 Jan 2017 16:10:39 -0500 From: Hans de Goede To: Daniel Vetter , Jani Nikula , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Jarkko Nikula , Wolfram Sang , Len Brown , Andy Shevchenko , Thomas Gleixner , "H . Peter Anvin" Subject: [PATCH v2 13/13] drm/i915: Acquire P-Unit access when modifying P-Unit settings Date: Mon, 23 Jan 2017 22:09:58 +0100 Message-Id: <20170123210958.18410-14-hdegoede@redhat.com> In-Reply-To: <20170123210958.18410-1-hdegoede@redhat.com> References: <20170123210958.18410-1-hdegoede@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 23 Jan 2017 21:10:42 +0000 (UTC) Cc: "russianneuromancer @ ya . ru" , intel-gfx , dri-devel@lists.freedesktop.org, Hans de Goede , linux-i2c@vger.kernel.org, Mika Westerberg X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Make sure the P-Unit or the PMIC i2c bus is not in use when we send a request to the P-Unit by calling iosf_mbi_punit_acquire() / _release() around P-Unit write accesses. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=155241 Signed-off-by: Hans de Goede Tested-by: tagorereddy --- Changes in v2: -Spelling: P-Unit, PMIC -Adjust for iosf_mbi_punit_lock/_unlock to _acquire/_release rename --- drivers/gpu/drm/i915/intel_display.c | 6 ++++++ drivers/gpu/drm/i915/intel_pm.c | 9 +++++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 9 +++++++++ 3 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5604701..13e5152 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -47,6 +47,7 @@ #include #include #include +#include static bool is_mmio_work(struct intel_flip_work *work) { @@ -6421,6 +6422,8 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk) cmd = 0; mutex_lock(&dev_priv->rps.hw_lock); + iosf_mbi_punit_acquire(); + val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); val &= ~DSPFREQGUAR_MASK; val |= (cmd << DSPFREQGUAR_SHIFT); @@ -6430,6 +6433,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk) 50)) { DRM_ERROR("timed out waiting for CDclk change\n"); } + iosf_mbi_punit_release(); mutex_unlock(&dev_priv->rps.hw_lock); mutex_lock(&dev_priv->sb_lock); @@ -6497,6 +6501,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk) cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1; mutex_lock(&dev_priv->rps.hw_lock); + iosf_mbi_punit_acquire(); val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); val &= ~DSPFREQGUAR_MASK_CHV; val |= (cmd << DSPFREQGUAR_SHIFT_CHV); @@ -6506,6 +6511,7 @@ static void cherryview_set_cdclk(struct drm_device *dev, int cdclk) 50)) { DRM_ERROR("timed out waiting for CDclk change\n"); } + iosf_mbi_punit_release(); mutex_unlock(&dev_priv->rps.hw_lock); intel_update_cdclk(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 249623d..adff84a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -32,6 +32,7 @@ #include "../../../platform/x86/intel_ips.h" #include #include +#include /** * DOC: RC6 @@ -276,6 +277,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) u32 val; mutex_lock(&dev_priv->rps.hw_lock); + iosf_mbi_punit_acquire(); val = vlv_punit_read(dev_priv, PUNIT_REG_DDR_SETUP2); if (enable) @@ -290,6 +292,7 @@ static void chv_set_memory_dvfs(struct drm_i915_private *dev_priv, bool enable) FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) DRM_ERROR("timed out waiting for Punit DDR DVFS request\n"); + iosf_mbi_punit_release(); mutex_unlock(&dev_priv->rps.hw_lock); } @@ -298,6 +301,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable) u32 val; mutex_lock(&dev_priv->rps.hw_lock); + iosf_mbi_punit_acquire(); val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); if (enable) @@ -306,6 +310,7 @@ static void chv_set_memory_pm5(struct drm_i915_private *dev_priv, bool enable) val &= ~DSP_MAXFIFO_PM5_ENABLE; vlv_punit_write(dev_priv, PUNIT_REG_DSPFREQ, val); + iosf_mbi_punit_release(); mutex_unlock(&dev_priv->rps.hw_lock); } @@ -4553,6 +4558,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev) if (IS_CHERRYVIEW(dev_priv)) { mutex_lock(&dev_priv->rps.hw_lock); + iosf_mbi_punit_acquire(); val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); if (val & DSP_MAXFIFO_PM5_ENABLE) @@ -4582,6 +4588,7 @@ void vlv_wm_get_hw_state(struct drm_device *dev) wm->level = VLV_WM_LEVEL_DDR_DVFS; } + iosf_mbi_punit_release(); mutex_unlock(&dev_priv->rps.hw_lock); } @@ -4988,7 +4995,9 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val) I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, val)); if (val != dev_priv->rps.cur_freq) { + iosf_mbi_punit_acquire(); vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val); + iosf_mbi_punit_release(); if (!IS_CHERRYVIEW(dev_priv)) gen6_set_rps_thresholds(dev_priv, val); } diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index c0b7e95..e66bcc8 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -28,6 +28,7 @@ #include #include +#include #include "i915_drv.h" #include "intel_drv.h" @@ -1027,6 +1028,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv, if (COND) goto out; + iosf_mbi_punit_acquire(); + ctrl = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL); ctrl &= ~mask; ctrl |= state; @@ -1037,6 +1040,8 @@ static void vlv_set_power_well(struct drm_i915_private *dev_priv, state, vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_CTRL)); + iosf_mbi_punit_release(); + #undef COND out: @@ -1643,6 +1648,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv, if (COND) goto out; + iosf_mbi_punit_acquire(); + ctrl = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ); ctrl &= ~DP_SSC_MASK(pipe); ctrl |= enable ? DP_SSC_PWR_ON(pipe) : DP_SSC_PWR_GATE(pipe); @@ -1653,6 +1660,8 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv, state, vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ)); + iosf_mbi_punit_release(); + #undef COND out: