From patchwork Fri Apr 28 22:42:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Anholt X-Patchwork-Id: 9705569 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 06B8560245 for ; Fri, 28 Apr 2017 22:42:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BCB3026D05 for ; Fri, 28 Apr 2017 22:42:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B0FC7280CF; Fri, 28 Apr 2017 22:42:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2DA3C26D05 for ; Fri, 28 Apr 2017 22:42:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B301F6E831; Fri, 28 Apr 2017 22:42:30 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from anholt.net (anholt.net [50.246.234.109]) by gabe.freedesktop.org (Postfix) with ESMTP id 2CA166E028 for ; Fri, 28 Apr 2017 22:42:28 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by anholt.net (Postfix) with ESMTP id 6D5B310A1FB4; Fri, 28 Apr 2017 15:42:27 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at anholt.net Received: from anholt.net ([127.0.0.1]) by localhost (kingsolver.anholt.net [127.0.0.1]) (amavisd-new, port 10024) with LMTP id AoBfeI7AeNsI; Fri, 28 Apr 2017 15:42:24 -0700 (PDT) Received: from eliezer.anholt.net (localhost [127.0.0.1]) by anholt.net (Postfix) with ESMTP id 8BBC310A1E4F; Fri, 28 Apr 2017 15:42:24 -0700 (PDT) Received: by eliezer.anholt.net (Postfix, from userid 1000) id 38D1D2E2841; Fri, 28 Apr 2017 15:42:23 -0700 (PDT) From: Eric Anholt To: dri-devel@lists.freedesktop.org, Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 1/3] drm/vc4: Turn the V3D clock on at runtime. Date: Fri, 28 Apr 2017 15:42:21 -0700 Message-Id: <20170428224223.21904-1-eric@anholt.net> X-Mailer: git-send-email 2.11.0 Cc: linux-kernel@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP For the Raspberry Pi's bindings, the power domain also implicitly turns on the clock and deasserts reset, but for the new Cygnus port we start representing the clock in the devicetree. v2: Document the clock-names property, check for -ENOENT for no clock in DT. v3: Drop NULL checks around clk calls which embed NULL checks. v4: Drop clk-names (feedback by Rob Herring) Signed-off-by: Eric Anholt Acked-by: Rob Herring --- .../devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ drivers/gpu/drm/vc4/vc4_drv.h | 1 + drivers/gpu/drm/vc4/vc4_v3d.c | 31 +++++++++++++++++++++- 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt index ca02d3e4db91..bc1756f4f791 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt @@ -59,6 +59,9 @@ Required properties for V3D: - interrupts: The interrupt number See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +Optional properties for V3D: +- clocks: The clock the unit runs on + Required properties for DSI: - compatible: Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1" - reg: Physical base address and length of the DSI block's registers diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index b0967e2f7e88..92eb7d811bf2 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -200,6 +200,7 @@ struct vc4_v3d { struct vc4_dev *vc4; struct platform_device *pdev; void __iomem *regs; + struct clk *clk; }; struct vc4_hvs { diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index a88078d7c9d1..7500820e5cd5 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -16,6 +16,7 @@ * this program. If not, see . */ +#include "linux/clk.h" #include "linux/component.h" #include "linux/pm_runtime.h" #include "vc4_drv.h" @@ -305,6 +306,8 @@ static int vc4_v3d_runtime_suspend(struct device *dev) drm_gem_object_put_unlocked(&vc4->bin_bo->base.base); vc4->bin_bo = NULL; + clk_disable_unprepare(v3d->clk); + return 0; } @@ -318,6 +321,10 @@ static int vc4_v3d_runtime_resume(struct device *dev) if (ret) return ret; + ret = clk_prepare_enable(v3d->clk); + if (ret != 0) + return ret; + vc4_v3d_init_hw(vc4->dev); vc4_irq_postinstall(vc4->dev); @@ -348,15 +355,37 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data) vc4->v3d = v3d; v3d->vc4 = vc4; + v3d->clk = devm_clk_get(dev, NULL); + if (IS_ERR(v3d->clk)) { + int ret = PTR_ERR(v3d->clk); + + if (ret == -ENOENT) { + /* bcm2835 didn't have a clock reference in the DT. */ + ret = 0; + v3d->clk = NULL; + } else { + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get V3D clock: %d\n", + ret); + return ret; + } + } + if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) { DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n", V3D_READ(V3D_IDENT0), V3D_EXPECTED_IDENT0); return -EINVAL; } + ret = clk_prepare_enable(v3d->clk); + if (ret != 0) + return ret; + ret = vc4_allocate_bin_bo(drm); - if (ret) + if (ret) { + clk_disable_unprepare(v3d->clk); return ret; + } /* Reset the binner overflow address/size at setup, to be sure * we don't reuse an old one.