From patchwork Wed May 17 16:43:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 9732125 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4E6F06022E for ; Wed, 17 May 2017 23:41:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6E9B287E9 for ; Wed, 17 May 2017 23:41:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB50F287F5; Wed, 17 May 2017 23:41:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4CEC9287F4 for ; Wed, 17 May 2017 23:41:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED15F6E4BF; Wed, 17 May 2017 23:37:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from nov-007-i458.relay.mailchannels.net (nov-007-i458.relay.mailchannels.net [46.232.183.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1158D8982E for ; Wed, 17 May 2017 16:45:53 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 32E138A3FA3; Wed, 17 May 2017 16:45:44 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.126.214]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id 45E2C8A443E; Wed, 17 May 2017 16:45:43 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.20.104.49]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.9.3); Wed, 17 May 2017 16:45:44 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Stop-Desert: 3cdc80dc56b88106_1495039544023_2519139858 X-MC-Loop-Signature: 1495039544023:3637477730 X-MC-Ingress-Time: 1495039544023 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 725054DD1C; Wed, 17 May 2017 16:45:36 +0000 (UTC) From: Icenowy Zheng To: Maxime Ripard , Rob Herring , Chen-Yu Tsai Subject: [RFC PATCH 06/11] drm: sun4i: add color space correction support for DE2 mixer Date: Thu, 18 May 2017 00:43:49 +0800 Message-Id: <20170517164354.16399-7-icenowy@aosc.io> In-Reply-To: <20170517164354.16399-1-icenowy@aosc.io> References: <20170517164354.16399-1-icenowy@aosc.io> X-Mailman-Approved-At: Wed, 17 May 2017 23:35:44 +0000 Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The DE2 mixer can do color space correction needed by TV Encoder with its DCSC sub-engine. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +++++- 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index d658a3a8159a..65f86641eca3 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -29,6 +29,14 @@ #include "sun8i_layer.h" #include "sunxi_engine.h" +static const u32 sun8i_rgb2yuv_coef[12] = { + 0x00000107, 0x00000204, 0x00000064, 0x00004200, + 0x00001f68, 0x00001ed6, 0x000001c2, 0x00020200, + 0x000001c2, 0x00001e87, 0x00001fb7, 0x00020200, +}; + +static const u32 sun8i_rgb2yuv_dcsc_alpha = 0x00020200; + static void sun8i_mixer_commit(struct sunxi_engine *engine) { DRM_DEBUG_DRIVER("Committing changes\n"); @@ -37,6 +45,31 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine) SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } +static void sun8i_mixer_apply_color_correction(struct sunxi_engine *engine) +{ + int i; + + DRM_DEBUG_DRIVER("Applying RGB to YUV color correction\n"); + + /* Set color correction */ + regmap_write(engine->regs, SUN8I_MIXER_DCSC_EN, 1); + + for (i = 0; i < 12; i++) + regmap_write(engine->regs, SUN8I_MIXER_DCSC_COEF_REG(i), + sun8i_rgb2yuv_coef[i]); + + regmap_write(engine->regs, SUN8I_MIXER_DCSC_COEF_ALPHA, + sun8i_rgb2yuv_dcsc_alpha); +} + +static void sun8i_mixer_disable_color_correction(struct sunxi_engine *engine) +{ + DRM_DEBUG_DRIVER("Disabling color correction\n"); + + /* Disable color correction */ + regmap_write(engine->regs, SUN8I_MIXER_DCSC_EN, 0); +} + void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, int layer, bool enable) { @@ -229,6 +262,8 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, static const struct sunxi_engine_ops sun8i_engine_ops = { .commit = sun8i_mixer_commit, .layers_init = sun8i_layers_init, + .apply_color_correction = sun8i_mixer_apply_color_correction, + .disable_color_correction = sun8i_mixer_disable_color_correction, }; static struct regmap_config sun8i_mixer_regmap_config = { diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 4785ac090b8c..d7f7513898b6 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -88,6 +88,11 @@ #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8) #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF (0xff << 24) +/* The DCSC sub-engine is used to do color space conversation */ +#define SUN8I_MIXER_DCSC_EN 0xb0000 +#define SUN8I_MIXER_DCSC_COEF_REG(x) (0xb0010 + 0x4 * x) +#define SUN8I_MIXER_DCSC_COEF_ALPHA 0xb0040 + /* * These sub-engines are still unknown now, the EN registers are here only to * be used to disable these sub-engines. @@ -102,7 +107,6 @@ #define SUN8I_MIXER_PEAK_EN 0xa6000 #define SUN8I_MIXER_ASE_EN 0xa8000 #define SUN8I_MIXER_FCC_EN 0xaa000 -#define SUN8I_MIXER_DCSC_EN 0xb0000 struct sun8i_mixer_cfg { int vi_num;