From patchwork Wed Jun 28 20:54:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gustavo Padovan X-Patchwork-Id: 9815505 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 960E160365 for ; Wed, 28 Jun 2017 20:55:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 892B82013D for ; Wed, 28 Jun 2017 20:55:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7DD6022701; Wed, 28 Jun 2017 20:55:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 097B32013D for ; Wed, 28 Jun 2017 20:55:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DCF066E5CC; Wed, 28 Jun 2017 20:55:12 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qk0-f195.google.com (mail-qk0-f195.google.com [209.85.220.195]) by gabe.freedesktop.org (Postfix) with ESMTPS id C3B576E5C4; Wed, 28 Jun 2017 20:55:09 +0000 (UTC) Received: by mail-qk0-f195.google.com with SMTP id 16so9259735qkg.2; Wed, 28 Jun 2017 13:55:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WNXfmu6hqPLM1ygRVNDXLqpb5ltXAsX8FdfNx5Svdp4=; b=d+yWQGpU6VxsaDyzf7SptXkeogcyM5Ors+K7DhT0h3iMyWppMHsykMUwQZz0oHHs1g +WWDEJo9J/AM4SSTNR8FdvhXl53NPYgXagkRsnTvIIjLW+kfCCdMwYJS9rKulYCtzITS uNMpEpCC325Q3HqQbp5Tb+YDzNi2NuIhXuS/rk1zNxnvSl/A6KFxUMCrKEz8NemhSkAW 3I9n3sDJtePdUvGFpXyU5lSrFceOPKkNgdvVEvVEWpKAoG0Fj2fWMDo1a/DkpTWoIuev uRE2ZBVoZec4aJU/ipSWs2edx+EkwNssVKaUZNVs1Tb8BcpayLlqswC1BmIausmZt8HJ ATvQ== X-Gm-Message-State: AKS2vOyd0NhSxNlSyuVZUPTHDfxATNbwgu0AmuPNn0hJmGn/oTlZsAq0 +ovRYJ3tCSXKYWZmyiM= X-Received: by 10.55.128.130 with SMTP id b124mr14308919qkd.109.1498683308702; Wed, 28 Jun 2017 13:55:08 -0700 (PDT) Received: from localhost.localdomain ([177.9.58.168]) by smtp.gmail.com with ESMTPSA id j65sm2343188qkf.38.2017.06.28.13.55.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Jun 2017 13:55:08 -0700 (PDT) From: Gustavo Padovan To: dri-devel@lists.freedesktop.org Subject: [PATCH v3 2/6] drm/i915: update cursors asynchronously through atomic Date: Wed, 28 Jun 2017 17:54:56 -0300 Message-Id: <20170628205500.8015-3-gustavo@padovan.org> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628205500.8015-1-gustavo@padovan.org> References: <20170628205500.8015-1-gustavo@padovan.org> MIME-Version: 1.0 Cc: Gustavo Padovan , intel-gfx@lists.freedesktop.org, Daniel Vetter X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan Add support to async updates of cursors by using the new atomic interface for that. Basically what this commit does is do what intel_legacy_cursor_update() did but through atomic. v3: - set correct vma to new state for cleanup - move size checks back to drivers (Ville Syrjälä) v2: - move fb setting to core and use new state (Eric Anholt) Cc: Daniel Vetter Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/i915/intel_atomic_plane.c | 73 +++++++++++++++ drivers/gpu/drm/i915/intel_display.c | 149 +++++------------------------- 2 files changed, 97 insertions(+), 125 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c index a40c82c..1737b8a 100644 --- a/drivers/gpu/drm/i915/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c @@ -246,11 +246,84 @@ static void intel_plane_atomic_update(struct drm_plane *plane, } } +static int intel_plane_atomic_async_check(struct drm_plane *plane, + struct drm_plane_state *state) +{ + struct drm_crtc *crtc = plane->state->crtc; + struct drm_crtc_state *crtc_state = crtc->state; + + if (plane->type != DRM_PLANE_TYPE_CURSOR) + return -EINVAL; + + /* + * When crtc is inactive or there is a modeset pending, + * wait for it to complete in the slowpath + */ + if (!crtc_state->active || to_intel_crtc_state(crtc_state)->update_pipe) + return -EINVAL; + + /* + * If any parameters change that may affect watermarks, + * take the slowpath. Only changing fb or position should be + * in the fastpath. + */ + if (plane->state->crtc != state->crtc || + plane->state->src_w != state->src_w || + plane->state->src_h != state->src_h || + plane->state->crtc_w != state->crtc_w || + plane->state->crtc_h != state->crtc_h || + !plane->state->fb != !state->fb) + return -EINVAL; + + return 0; +} + +static void intel_plane_atomic_async_update(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct intel_plane *intel_plane = to_intel_plane(plane); + struct drm_crtc *crtc = plane->state->crtc; + struct drm_framebuffer *old_fb; + struct i915_vma *old_vma; + + old_vma = to_intel_plane_state(plane->state)->vma; + old_fb = plane->state->fb; + + i915_gem_track_fb(intel_fb_obj(old_fb), intel_fb_obj(new_state->fb), + intel_plane->frontbuffer_bit); + + plane->state->src_x = new_state->src_x; + plane->state->src_y = new_state->src_y; + plane->state->crtc_x = new_state->crtc_x; + plane->state->crtc_y = new_state->crtc_y; + plane->state->fb = new_state->fb; + *to_intel_plane_state(plane->state) = *to_intel_plane_state(new_state); + + to_intel_plane_state(new_state)->vma = old_vma; + new_state->fb = old_fb; + + if (plane->state->visible) { + trace_intel_update_plane(plane, to_intel_crtc(crtc)); + intel_plane->update_plane(plane, + to_intel_crtc_state(crtc->state), + to_intel_plane_state(plane->state)); + } else { + trace_intel_disable_plane(plane, to_intel_crtc(crtc)); + intel_plane->disable_plane(plane, crtc); + } + + mutex_lock(&plane->dev->struct_mutex); + intel_cleanup_plane_fb(plane, new_state); + mutex_unlock(&plane->dev->struct_mutex); +} + const struct drm_plane_helper_funcs intel_plane_helper_funcs = { .prepare_fb = intel_prepare_plane_fb, .cleanup_fb = intel_cleanup_plane_fb, .atomic_check = intel_plane_atomic_check, .atomic_update = intel_plane_atomic_update, + .atomic_async_check = intel_plane_atomic_async_check, + .atomic_async_update = intel_plane_atomic_async_update, }; /** diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 636c64e..736301d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13004,6 +13004,26 @@ static int intel_atomic_commit(struct drm_device *dev, struct drm_i915_private *dev_priv = to_i915(dev); int ret = 0; + /* + * The atomic async update fast path takes care + * of avoiding the vblank waits for simple cursor + * movement and flips. For cursor on/off and size changes, + * we want to perform the vblank waits so that watermark + * updates happen during the correct frames. Gen9+ have + * double buffered watermarks and so shouldn't need this. + */ + if (state->async_update) { + ret = mutex_lock_interruptible(&dev->struct_mutex); + if (ret) + return ret; + + ret = drm_atomic_helper_prepare_planes(dev, state); + mutex_unlock(&dev->struct_mutex); + + drm_atomic_helper_async_commit(dev, state); + return 0; + } + ret = drm_atomic_helper_setup_commit(state, nonblock); if (ret) return ret; @@ -13162,6 +13182,9 @@ intel_prepare_plane_fb(struct drm_plane *plane, } } + if (new_state->state->async_update) + return 0; + if (!obj && !old_obj) return 0; @@ -13389,132 +13412,8 @@ const struct drm_plane_funcs intel_plane_funcs = { .atomic_destroy_state = intel_plane_destroy_state, }; -static int -intel_legacy_cursor_update(struct drm_plane *plane, - struct drm_crtc *crtc, - struct drm_framebuffer *fb, - int crtc_x, int crtc_y, - unsigned int crtc_w, unsigned int crtc_h, - uint32_t src_x, uint32_t src_y, - uint32_t src_w, uint32_t src_h, - struct drm_modeset_acquire_ctx *ctx) -{ - struct drm_i915_private *dev_priv = to_i915(crtc->dev); - int ret; - struct drm_plane_state *old_plane_state, *new_plane_state; - struct intel_plane *intel_plane = to_intel_plane(plane); - struct drm_framebuffer *old_fb; - struct drm_crtc_state *crtc_state = crtc->state; - struct i915_vma *old_vma; - - /* - * When crtc is inactive or there is a modeset pending, - * wait for it to complete in the slowpath - */ - if (!crtc_state->active || needs_modeset(crtc_state) || - to_intel_crtc_state(crtc_state)->update_pipe) - goto slow; - - old_plane_state = plane->state; - - /* - * If any parameters change that may affect watermarks, - * take the slowpath. Only changing fb or position should be - * in the fastpath. - */ - if (old_plane_state->crtc != crtc || - old_plane_state->src_w != src_w || - old_plane_state->src_h != src_h || - old_plane_state->crtc_w != crtc_w || - old_plane_state->crtc_h != crtc_h || - !old_plane_state->fb != !fb) - goto slow; - - new_plane_state = intel_plane_duplicate_state(plane); - if (!new_plane_state) - return -ENOMEM; - - drm_atomic_set_fb_for_plane(new_plane_state, fb); - - new_plane_state->src_x = src_x; - new_plane_state->src_y = src_y; - new_plane_state->src_w = src_w; - new_plane_state->src_h = src_h; - new_plane_state->crtc_x = crtc_x; - new_plane_state->crtc_y = crtc_y; - new_plane_state->crtc_w = crtc_w; - new_plane_state->crtc_h = crtc_h; - - ret = intel_plane_atomic_check_with_state(to_intel_crtc_state(crtc->state), - to_intel_plane_state(new_plane_state)); - if (ret) - goto out_free; - - ret = mutex_lock_interruptible(&dev_priv->drm.struct_mutex); - if (ret) - goto out_free; - - if (INTEL_INFO(dev_priv)->cursor_needs_physical) { - int align = IS_I830(dev_priv) ? 16 * 1024 : 256; - - ret = i915_gem_object_attach_phys(intel_fb_obj(fb), align); - if (ret) { - DRM_DEBUG_KMS("failed to attach phys object\n"); - goto out_unlock; - } - } else { - struct i915_vma *vma; - - vma = intel_pin_and_fence_fb_obj(fb, new_plane_state->rotation); - if (IS_ERR(vma)) { - DRM_DEBUG_KMS("failed to pin object\n"); - - ret = PTR_ERR(vma); - goto out_unlock; - } - - to_intel_plane_state(new_plane_state)->vma = vma; - } - - old_fb = old_plane_state->fb; - old_vma = to_intel_plane_state(old_plane_state)->vma; - - i915_gem_track_fb(intel_fb_obj(old_fb), intel_fb_obj(fb), - intel_plane->frontbuffer_bit); - - /* Swap plane state */ - new_plane_state->fence = old_plane_state->fence; - *to_intel_plane_state(old_plane_state) = *to_intel_plane_state(new_plane_state); - new_plane_state->fence = NULL; - new_plane_state->fb = old_fb; - to_intel_plane_state(new_plane_state)->vma = old_vma; - - if (plane->state->visible) { - trace_intel_update_plane(plane, to_intel_crtc(crtc)); - intel_plane->update_plane(plane, - to_intel_crtc_state(crtc->state), - to_intel_plane_state(plane->state)); - } else { - trace_intel_disable_plane(plane, to_intel_crtc(crtc)); - intel_plane->disable_plane(plane, crtc); - } - - intel_cleanup_plane_fb(plane, new_plane_state); - -out_unlock: - mutex_unlock(&dev_priv->drm.struct_mutex); -out_free: - intel_plane_destroy_state(plane, new_plane_state); - return ret; - -slow: - return drm_atomic_helper_update_plane(plane, crtc, fb, - crtc_x, crtc_y, crtc_w, crtc_h, - src_x, src_y, src_w, src_h, ctx); -} - static const struct drm_plane_funcs intel_cursor_plane_funcs = { - .update_plane = intel_legacy_cursor_update, + .update_plane = drm_atomic_helper_update_plane, .disable_plane = drm_atomic_helper_disable_plane, .destroy = intel_plane_destroy, .set_property = drm_atomic_helper_plane_set_property,