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[V3,04/23] drm/etnaviv: add uapi for perfmon feature

Message ID 20170825090722.14745-5-christian.gmeiner@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Christian Gmeiner Aug. 25, 2017, 9:07 a.m. UTC
Sadly we can not read any registers via command stream so we need
to extend the drm_etnaviv_gem_submit struct with performance monitor
requests. Those requests gets process before or after the actual
submitted command stream.

The Vivante kernel driver has a special ioctl to read all perfmon
registers at once and return it.

Changes from v1 -> v2:
- use a 16 bit value for signals
- fix padding issues

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
---
 include/uapi/drm/etnaviv_drm.h | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)
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Patch

diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
index 9e488a083389..25b4498a03fe 100644
--- a/include/uapi/drm/etnaviv_drm.h
+++ b/include/uapi/drm/etnaviv_drm.h
@@ -150,6 +150,19 @@  struct drm_etnaviv_gem_submit_bo {
 	__u64 presumed;       /* in/out, presumed buffer address */
 };
 
+/* performance monitor request (pmr) */
+#define ETNA_PM_PROCESS_PRE             0x0001
+#define ETNA_PM_PROCESS_POST            0x0002
+struct drm_etnaviv_gem_submit_pmr {
+	__u32 flags;          /* in, when to process request (ETNA_PM_PROCESS_x) */
+	__u8  domain;         /* in, pm domain */
+	__u8  pad;
+	__u16 signal;         /* in, pm signal */
+	__u32 sequence;       /* in, sequence number */
+	__u32 read_offset;    /* in, offset from read_bo */
+	__u32 read_idx;       /* in, index of read_bo buffer */
+};
+
 /* Each cmdstream submit consists of a table of buffers involved, and
  * one or more cmdstream buffers.  This allows for conditional execution
  * (context-restore), and IB buffers needed for per tile/bin draw cmds.
@@ -175,6 +188,9 @@  struct drm_etnaviv_gem_submit {
 	__u64 stream;         /* in, ptr to cmdstream */
 	__u32 flags;          /* in, mask of ETNA_SUBMIT_x */
 	__s32 fence_fd;       /* in/out, fence fd (see ETNA_SUBMIT_FENCE_FD_x) */
+	__u64 pmrs;           /* in, ptr to array of submit_pmr's */
+	__u32 nr_pmrs;        /* in, number of submit_pmr's */
+	__u32 pad;
 };
 
 /* The normal way to synchronize with the GPU is just to CPU_PREP on
@@ -217,14 +233,16 @@  struct drm_etnaviv_gem_wait {
 struct drm_etnaviv_pm_domain {
 	__u32 pipe;       /* in */
 	__u8  iter;       /* in/out, select pm domain at index iter */
-	__u8  nr_signals; /* out, how many signals does this domain provide */
+	__u8  pad;
+	__u16 nr_signals; /* out, how many signals does this domain provide */
 	char  name[64];   /* out, name of domain */
 };
 
 struct drm_etnaviv_pm_signal {
 	__u32 pipe;       /* in */
 	__u8  domain;     /* in, pm domain index */
-	__u8  iter;       /* in/out, select pm source at index iter */
+	__u8  pad;
+	__u16 iter;       /* in/out, select pm source at index iter */
 	char  name[64];   /* out, name of domain */
 };