| Message ID | 20170927193654.12609-2-eric@anholt.net (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Sep 27, 2017 at 12:36:52PM -0700, Eric Anholt wrote: > We want the adjusted_mode->clock to be the actual clock we're > expecting to program, so that consumers see the right values for clock > and vrefresh. > > Signed-off-by: Eric Anholt <eric@anholt.net> > --- > drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) Do you want me to apply this to drm-misc-next along with the touchscreen panel driver? Thierry
Thierry Reding <thierry.reding@gmail.com> writes: > [ Unknown signature status ] > On Wed, Sep 27, 2017 at 12:36:52PM -0700, Eric Anholt wrote: >> We want the adjusted_mode->clock to be the actual clock we're >> expecting to program, so that consumers see the right values for clock >> and vrefresh. >> >> Signed-off-by: Eric Anholt <eric@anholt.net> >> --- >> drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++++++------ >> 1 file changed, 6 insertions(+), 6 deletions(-) > > Do you want me to apply this to drm-misc-next along with the touchscreen > panel driver? drm-misc-next procedure trends toward the submitter applies the patch once they get review, if they have the commit rights. However, I'm happy either way as long as I can get the code in.
diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c index 925c726ac694..554605af344e 100644 --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c @@ -859,11 +859,7 @@ static bool vc4_dsi_encoder_mode_fixup(struct drm_encoder *encoder, pll_clock = parent_rate / divider; pixel_clock_hz = pll_clock / dsi->divider; - /* Round up the clk_set_rate() request slightly, since - * PLLD_DSI1 is an integer divider and its rate selection will - * never round up. - */ - adjusted_mode->clock = pixel_clock_hz / 1000 + 1; + adjusted_mode->clock = pixel_clock_hz / 1000; /* Given the new pixel clock, adjust HFP to keep vrefresh the same. */ adjusted_mode->htotal = adjusted_mode->clock * mode->htotal / @@ -901,7 +897,11 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) vc4_dsi_dump_regs(dsi); } - phy_clock = pixel_clock_hz * dsi->divider; + /* Round up the clk_set_rate() request slightly, since + * PLLD_DSI1 is an integer divider and its rate selection will + * never round up. + */ + phy_clock = (pixel_clock_hz + 1000) * dsi->divider; ret = clk_set_rate(dsi->pll_phy_clock, phy_clock); if (ret) { dev_err(&dsi->pdev->dev,
We want the adjusted_mode->clock to be the actual clock we're expecting to program, so that consumers see the right values for clock and vrefresh. Signed-off-by: Eric Anholt <eric@anholt.net> --- drivers/gpu/drm/vc4/vc4_dsi.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)