From patchwork Fri Dec 22 12:22:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 10131455 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id F0FE36037D for ; Sat, 23 Dec 2017 10:06:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E33292912F for ; Sat, 23 Dec 2017 10:06:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D80952913A; Sat, 23 Dec 2017 10:06:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 97AE72912F for ; Sat, 23 Dec 2017 10:06:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A8996E7E5; Sat, 23 Dec 2017 10:06:22 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from burlywood.maple.relay.mailchannels.net (burlywood.maple.relay.mailchannels.net [23.83.214.26]) by gabe.freedesktop.org (Postfix) with ESMTPS id 645466E02A for ; Fri, 22 Dec 2017 12:25:37 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 8E57B3E12C1; Fri, 22 Dec 2017 12:25:36 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.22.19]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id B6F4C3E121A; Fri, 22 Dec 2017 12:25:35 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.18.55.125]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.11.3); Fri, 22 Dec 2017 12:25:36 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Irritate-Celery: 1bb853d1068dd180_1513945536378_2018072652 X-MC-Loop-Signature: 1513945536378:692104837 X-MC-Ingress-Time: 1513945536377 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 5B2D9509E3; Fri, 22 Dec 2017 12:25:31 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH v3 05/11] ARM: sun8i: h3/h5: add DE2 CCU device node for H3 Date: Fri, 22 Dec 2017 20:22:37 +0800 Message-Id: <20171222122243.25735-6-icenowy@aosc.io> In-Reply-To: <20171222122243.25735-1-icenowy@aosc.io> References: <20171222122243.25735-1-icenowy@aosc.io> X-Mailman-Approved-At: Sat, 23 Dec 2017 10:06:06 +0000 Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The DE2 in H3/H5 has a clock control unit in it, and the behavior is slightly different between H3 and H5. Add the common parts in H3/H5 DTSI, and add the compatible string in H3 DTSI. The compatible string of H5 DE2 CCU will be added in a separated patch. Signed-off-by: Icenowy Zheng --- Changes in v2: - Use H3 DE2 CCU compatible as it's discovered that H3 and A83T DE2 CCU are not equal. arch/arm/boot/dts/sun8i-h3.dtsi | 4 ++++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index b36f9f423c39..8495deecedad 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -85,6 +85,10 @@ compatible = "allwinner,sun8i-h3-ccu"; }; +&display_clocks { + compatible = "allwinner,sun8i-h3-de2-clk"; +}; + &mmc0 { compatible = "allwinner,sun7i-a20-mmc"; clocks = <&ccu CLK_BUS_MMC0>, diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 8d40c00d64bb..fcb909658cf0 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -40,9 +40,11 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include #include #include #include +#include #include #include @@ -85,6 +87,18 @@ #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + /* compatible is in per SoC .dtsi file */ + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + syscon: syscon@1c00000 { compatible = "allwinner,sun8i-h3-system-controller", "syscon";