From patchwork Fri Dec 22 12:22:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 10131449 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 146D26037D for ; Sat, 23 Dec 2017 10:06:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06AAC2912F for ; Sat, 23 Dec 2017 10:06:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE7A82913A; Sat, 23 Dec 2017 10:06:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 058562912F for ; Sat, 23 Dec 2017 10:06:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 48DD06E180; Sat, 23 Dec 2017 10:06:10 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from nov-007-i571.relay.mailchannels.net (nov-007-i571.relay.mailchannels.net [46.232.183.125]) by gabe.freedesktop.org (Postfix) with ESMTPS id A78476E02A for ; Fri, 22 Dec 2017 12:26:43 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 70B4B3E1014; Fri, 22 Dec 2017 12:26:40 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.29.5]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id 9A7DB3E107B; Fri, 22 Dec 2017 12:26:39 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.18.43.43]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.11.3); Fri, 22 Dec 2017 12:26:40 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Grain-Chief: 08e81faf3ecce273_1513945600224_3159007296 X-MC-Loop-Signature: 1513945600224:2985707707 X-MC-Ingress-Time: 1513945600224 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 96DD85464B; Fri, 22 Dec 2017 12:26:34 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH v3 08/11] dt-bindings: add binding for A64 DE2 CCU SRAM Date: Fri, 22 Dec 2017 20:22:40 +0800 Message-Id: <20171222122243.25735-9-icenowy@aosc.io> In-Reply-To: <20171222122243.25735-1-icenowy@aosc.io> References: <20171222122243.25735-1-icenowy@aosc.io> X-Mailman-Approved-At: Sat, 23 Dec 2017 10:06:06 +0000 Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP A64's Display Engine 2.0 needs a section of SRAM (SRAM C) to be claimed, otherwise the whole DE2 memory zone cannot be accessed (kept to all 0). Add binding for this, in order to make the DE2 CCU able to claim the SRAM and enable access to the DE2 clock and reset registers. Acked-by: Rob Herring Signed-off-by: Icenowy Zheng --- Changes in v3: - Add Rob's ACK. Documentation/devicetree/bindings/clock/sun8i-de2.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt b/Documentation/devicetree/bindings/clock/sun8i-de2.txt index f2fa87c4765c..a7d558a2b9b2 100644 --- a/Documentation/devicetree/bindings/clock/sun8i-de2.txt +++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt @@ -6,6 +6,7 @@ Required properties : - "allwinner,sun8i-a83t-de2-clk" - "allwinner,sun8i-h3-de2-clk" - "allwinner,sun8i-v3s-de2-clk" + - "allwinner,sun50i-a64-de2-clk" - "allwinner,sun50i-h5-de2-clk" - reg: Must contain the registers base address and length @@ -18,6 +19,10 @@ Required properties : - #clock-cells : must contain 1 - #reset-cells : must contain 1 +Additional required properties for "allwinner,sun50i-a64-de2-clk" : +- allwinner,sram: See Documentation/devicetree/bindings/sram/sunxi-sram.txt, + should be the SRAM C section on A64 SoC. + Example: de2_clocks: clock@1000000 { compatible = "allwinner,sun8i-h3-de2-clk";