From patchwork Thu Jan 18 13:43:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 10173257 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9C3C460230 for ; Thu, 18 Jan 2018 13:43:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86E03204BE for ; Thu, 18 Jan 2018 13:43:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 76528281DB; Thu, 18 Jan 2018 13:43:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5974F2818E for ; Thu, 18 Jan 2018 13:43:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10B056E52D; Thu, 18 Jan 2018 13:43:26 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id E49976E52D for ; Thu, 18 Jan 2018 13:43:23 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 160CC208E2; Thu, 18 Jan 2018 14:43:22 +0100 (CET) Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 78C9320885; Thu, 18 Jan 2018 14:43:11 +0100 (CET) From: Boris Brezillon To: Archit Taneja , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org Subject: [PATCH v5 1/2] drm/bridge: Add Cadence DSI driver Date: Thu, 18 Jan 2018 14:43:08 +0100 Message-Id: <20180118134309.13123-1-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.11.0 Cc: Thomas Petazzoni , "Menon, Nishanth" , Pawel Moll , Ian Campbell , Simon Hatliff , Mark Rutland , Jyri Sarha , Rob Herring , Alan Douglas , Tomi Valkeinen , Boris Brezillon , Suresh Punnoose , Kumar Gala , Maxime Ripard , Richard Sproul , devicetree@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add a driver for Cadence DPI -> DSI bridge. This driver only support a subset of Cadence DSI bridge capabilities. Here is a non-exhaustive list of missing features: * burst mode * DPHY init/configuration steps * support for additional input interfaces (SDI input) Signed-off-by: Boris Brezillon Reviewed-by: Andrzej Hajda Acked-by: Eric Anholt --- Hello, This version is still missing DPHY config/init code, mainly because I don't have a DPHY (either real or emulated) to test with. But I'm working on a DPHY abstraction layer to help extract common DPHY operations out of DSI drivers so that DPHY drivers can be used outside of the DRM world (I know D-PHYs can be used with CSI which belongs in V4L). Regards, Boris This version is still missing Changes in v5: - Add runtime PM support Changes in v4: - Fix typos - Rename clks as suggested by Tomi - Fix DSI setup done in cdns_dsi_bridge_enable() - Add a precision about where this bridge is supposed to used to the Kconfig entry - Let DRM_CDNS_DSI select DRM_PANEL_BRIDGE - Remove the IP version from the DT compatible name - Adapt register the layout to match the one used in the last revision of the IP (hopefully the final version) Changes in v3: - replace magic values by real timing calculation. The DPHY PLL clock is still hardcoded since we don't have a working DPHY block yet, and this is the piece of HW we need to dynamically configure the PLL rate based on the display refresh rate and the resolution. - parse DSI devices represented with the OF-graph. This is needed to support DSI devices controlled through an external bus like I2C or SPI. - use the DRM panel-bridge infrastructure to simplify the DRM panel logic Changes in v2: - rebase on v4.12-rc1 and adapt to driver to the drm_bridge API changes - return the correct error when devm_clk_get(sysclk) fails - add missing depends on OF and select DRM_PANEL in the Kconfig entry DSI runtime PM --- drivers/gpu/drm/bridge/Kconfig | 10 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/cdns-dsi.c | 1123 +++++++++++++++++++++++++++++++++++++ 3 files changed, 1134 insertions(+) create mode 100644 drivers/gpu/drm/bridge/cdns-dsi.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 3b99d5a06c16..acd5b6b9ffc9 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -25,6 +25,16 @@ config DRM_ANALOGIX_ANX78XX the HDMI output of an application processor to MyDP or DisplayPort. +config DRM_CDNS_DSI + tristate "Cadence DPI/DSI bridge" + select DRM_KMS_HELPER + select DRM_MIPI_DSI + select DRM_PANEL_BRIDGE + depends on OF + help + Support Cadence DPI to DSI bridge. This is an internal + bridge and is meant to be directly embedded in a SoC. + config DRM_DUMB_VGA_DAC tristate "Dumb VGA DAC Bridge support" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index e3d5eb031f18..a0fbf0fe5f69 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -1,4 +1,5 @@ obj-$(CONFIG_DRM_ANALOGIX_ANX78XX) += analogix-anx78xx.o +obj-$(CONFIG_DRM_CDNS_DSI) += cdns-dsi.o obj-$(CONFIG_DRM_DUMB_VGA_DAC) += dumb-vga-dac.o obj-$(CONFIG_DRM_LVDS_ENCODER) += lvds-encoder.o obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v3-fw.o diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c b/drivers/gpu/drm/bridge/cdns-dsi.c new file mode 100644 index 000000000000..c7f999522642 --- /dev/null +++ b/drivers/gpu/drm/bridge/cdns-dsi.c @@ -0,0 +1,1123 @@ +/* + * Copyright: 2017 Cadence Design Systems, Inc. + * + * Author: Boris Brezillon + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include