From patchwork Fri Jan 19 18:29:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 10175855 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3EAA260386 for ; Fri, 19 Jan 2018 18:35:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 28271212BE for ; Fri, 19 Jan 2018 18:35:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1C43B27B13; Fri, 19 Jan 2018 18:35:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A09A4212BE for ; Fri, 19 Jan 2018 18:35:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 848F36EAFC; Fri, 19 Jan 2018 18:35:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x241.google.com (mail-lf0-x241.google.com [IPv6:2a00:1450:4010:c07::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 976046EAFC for ; Fri, 19 Jan 2018 18:35:54 +0000 (UTC) Received: by mail-lf0-x241.google.com with SMTP id f3so3202335lfe.4 for ; Fri, 19 Jan 2018 10:35:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:message-id:user-agent:date:to:to:cc:to:subject:mime-version :content-disposition; bh=RbMRmCCPoutkHycpbvDkOL0S2vdS3CU5gvMo6NOCYWI=; b=pkn4Ar6szDftEd8Q+9bl9bUznBIsdhpOez7hd7KGoUYxS/PHGTAfrdr1Lo4iJEIuG2 +E48MI9u2vJB6nuN3LsMtiX0hgAu4gdhlL19EksqRYMwXFprdgk0qP9oj73EGU9NK6jP ZqZZfqYQul/FOaAJUq9J2e+pYl7yLtutY7T2yjiQNlO2GFUjfwzGCN/2MoqjcTzlO+Ik a1OTjThuUtJ+niTAFH0FkhZWjorI9pXTz6RS4I2wYLGy/LabVAqqT7LiKJTOOpDowDkz jVMxo+Imb0nqT4rITlLzmtu8wj0VBN8EUUzyz03ypecYFzAsbDRUdPtW9MV5gxKjcydu /H9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:message-id:user-agent:date:to:to:cc:to :subject:mime-version:content-disposition; bh=RbMRmCCPoutkHycpbvDkOL0S2vdS3CU5gvMo6NOCYWI=; b=DUvdFXnu6s/cz9phrnXTjk3I8VbSS0UMXAIKyNYEaylFNQwUMeNxJo+AaWp3lzHoGS uaniEwC76ddiVKSaRGdx1Q3pTGAGwe0CmG2MVIUEMNp8mZpxVKeZ81kwY9MHzE5wQljZ U40IGuzlslrQ3aZLeW4RMV471LcZrkjy4BukH4AP0cLXXGEaUM1fvMEjniixoUXmAlOb jy4PLTWcviXCQUDNaUaQCAmjVqpnxBx4UhxRihftCDE0zAG8StBYpi0PZueVYK6PkJ1G Hmn/XaXbsTjJpyfSoMJ40DF/5QkyHET67MS2Ik89cpdxQofayBoE0zaaQK4GQ8NVIOTG KwPA== X-Gm-Message-State: AKGB3mKCiNI+JHDOJYoC2lnqMuMU3Hr68B5YuKn5czxYwBmZesGTzR69 mT9uOYE6Ol+fNwxDCsazEunqDQ== X-Google-Smtp-Source: ACJfBovBKsayETJJ8J3qhgiVf43+ckLCY/sTJerKZpH8JQOGSCqA4ZM7Ly/N4sEvaoTTL3wFviG5dQ== X-Received: by 10.46.1.33 with SMTP id 33mr26039497ljb.128.1516386952929; Fri, 19 Jan 2018 10:35:52 -0800 (PST) Received: from wasted.cogentembedded.com ([31.173.82.43]) by smtp.gmail.com with ESMTPSA id h28sm1811530ljb.47.2018.01.19.10.35.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Jan 2018 10:35:51 -0800 (PST) From: Sergei Shtylyov X-Google-Original-From: "Sergei Shtylyov" Received: by wasted.cogentembedded.com (sSMTP sendmail emulation); Fri, 19 Jan 2018 21:35:49 +0300 Message-Id: <20180119183549.043204666@cogentembedded.com> User-Agent: quilt/0.64 Date: Fri, 19 Jan 2018 21:29:19 +0300 To: Laurent Pinchart , David Airlie , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org To: Rob Herring To: devicetree@vger.kernel.org Subject: [PATCH 1/3] drm: rcar-du: lvds: refactor LVDS startup MIME-Version: 1.0 Content-Disposition: inline; filename=drm-rcar-du-lvds-refactor-LVDS-startup.patch Cc: Mark Rutland , Sergei Shtylyov X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP After the recent corrections to the R-Car gen2/3 LVDS startup code, already similar enough at their ends rcar_lvds_enable_gen{2|3}() started asking for a merge and it's becoming actually necessary with the addition of the R-Car V3M (R8A77970) support -- this gen3 SoC has gen2-like LVDPLLCR layout. BTW, such a merge saves 64 bytes of the object code with AArch64 gcc 4.8.5. Signed-off-by: Sergei Shtylyov --- drivers/gpu/drm/rcar-du/rcar_lvds.c | 137 +++++++++++++++--------------------- 1 file changed, 59 insertions(+), 78 deletions(-) Index: linux/drivers/gpu/drm/rcar-du/rcar_lvds.c =================================================================== --- linux.orig/drivers/gpu/drm/rcar-du/rcar_lvds.c +++ linux/drivers/gpu/drm/rcar-du/rcar_lvds.c @@ -125,98 +125,46 @@ static const struct drm_connector_funcs * Bridge */ -static void rcar_lvds_enable_gen2(struct rcar_lvds *lvds) +static u32 rcar_lvds_lvdpllcr_gen2(unsigned int freq) { - const struct drm_display_mode *mode = &lvds->display_mode; - /* - * FIXME: We should really retrieve this through the state, but how do - * we get a state pointer? - */ - struct drm_crtc *crtc = lvds->bridge.encoder->crtc; - unsigned int freq = mode->clock; - u32 lvdcr0; - u32 pllcr; + u32 lvdpllcr; - /* PLL clock configuration */ if (freq < 39000) - pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_38M; + lvdpllcr = LVDPLLCR_PLLDLYCNT_38M; else if (freq < 61000) - pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_60M; + lvdpllcr = LVDPLLCR_PLLDLYCNT_60M; else if (freq < 121000) - pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_121M; + lvdpllcr = LVDPLLCR_PLLDLYCNT_121M; else - pllcr = LVDPLLCR_PLLDLYCNT_150M; - - rcar_lvds_write(lvds, LVDPLLCR, pllcr); - - /* Turn all the channels on. */ - rcar_lvds_write(lvds, LVDCR1, LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) | - LVDCR1_CHSTBY(1) | LVDCR1_CHSTBY(0) | LVDCR1_CLKSTBY); - - /* - * Set the LVDS mode, select the input, enable LVDS operation, - * and turn bias circuitry on. - */ - lvdcr0 = (lvds->mode << LVDCR0_LVMD_SHIFT) | LVDCR0_BEN | LVDCR0_LVEN; - if (drm_crtc_index(crtc) == 2) - lvdcr0 |= LVDCR0_DUSEL; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); - - /* - * Turn the PLL on, wait for the startup delay, and turn the output - * on. - */ - lvdcr0 |= LVDCR0_PLLON; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); + return LVDPLLCR_PLLDLYCNT_150M; - usleep_range(100, 150); - - lvdcr0 |= LVDCR0_LVRES; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); + return lvdpllcr | LVDPLLCR_CEEN | LVDPLLCR_COSEL; } -static void rcar_lvds_enable_gen3(struct rcar_lvds *lvds) +static u32 rcar_lvds_lvdpllcr_gen3(unsigned int freq) { - const struct drm_display_mode *mode = &lvds->display_mode; - unsigned int freq = mode->clock; - u32 lvdcr0; - u32 pllcr; - - /* PLL clock configuration */ if (freq < 42000) - pllcr = LVDPLLCR_PLLDIVCNT_42M; + return LVDPLLCR_PLLDIVCNT_42M; else if (freq < 85000) - pllcr = LVDPLLCR_PLLDIVCNT_85M; + return LVDPLLCR_PLLDIVCNT_85M; else if (freq < 128000) - pllcr = LVDPLLCR_PLLDIVCNT_128M; - else - pllcr = LVDPLLCR_PLLDIVCNT_148M; - - rcar_lvds_write(lvds, LVDPLLCR, pllcr); - - /* Turn all the channels on. */ - rcar_lvds_write(lvds, LVDCR1, LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) | - LVDCR1_CHSTBY(1) | LVDCR1_CHSTBY(0) | LVDCR1_CLKSTBY); + return LVDPLLCR_PLLDIVCNT_128M; - /* - * Turn the PLL on, set it to LVDS normal mode, wait for the startup - * delay and turn the output on. - */ - lvdcr0 = (lvds->mode << LVDCR0_LVMD_SHIFT) | LVDCR0_PLLON; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); - - lvdcr0 |= LVDCR0_PWD; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); - - usleep_range(100, 150); - - lvdcr0 |= LVDCR0_LVRES; - rcar_lvds_write(lvds, LVDCR0, lvdcr0); + return LVDPLLCR_PLLDIVCNT_148M; } static void rcar_lvds_enable(struct drm_bridge *bridge) { struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); + /* + * FIXME: We should really retrieve this through the state, but how do + * we get a state pointer? + */ + struct drm_crtc *crtc = lvds->bridge.encoder->crtc; + const struct drm_display_mode *mode = &lvds->display_mode; + unsigned int gen = lvds->info->gen; + u32 lvdcr0 = lvds->mode << LVDCR0_LVMD_SHIFT; + u32 lvdpllcr; u32 lvdhcr; int ret; @@ -244,14 +192,47 @@ static void rcar_lvds_enable(struct drm_ else lvdhcr = LVDCHCR_CHSEL_CH(0, 0) | LVDCHCR_CHSEL_CH(1, 1) | LVDCHCR_CHSEL_CH(2, 2) | LVDCHCR_CHSEL_CH(3, 3); - rcar_lvds_write(lvds, LVDCHCR, lvdhcr); - /* Perform generation-specific initialization. */ - if (lvds->info->gen < 3) - rcar_lvds_enable_gen2(lvds); + /* PLL clock configuration */ + if (gen < 3) + lvdpllcr = rcar_lvds_lvdpllcr_gen2(mode->clock); else - rcar_lvds_enable_gen3(lvds); + lvdpllcr = rcar_lvds_lvdpllcr_gen3(mode->clock); + rcar_lvds_write(lvds, LVDPLLCR, lvdpllcr); + + /* Turn all the channels on. */ + rcar_lvds_write(lvds, LVDCR1, + LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) | + LVDCR1_CHSTBY(1) | LVDCR1_CHSTBY(0) | LVDCR1_CLKSTBY); + + if (gen < 3) { + /* + * Select the input, enable LVDS operation, and turn + * the bias circuitry on. + */ + lvdcr0 |= LVDCR0_BEN | LVDCR0_LVEN; + if (drm_crtc_index(crtc) == 2) + lvdcr0 |= LVDCR0_DUSEL; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + /* Turn the PLL on. */ + lvdcr0 |= LVDCR0_PLLON; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + + if (gen > 2) { + /* Turn on the LVDS normal mode. */ + lvdcr0 |= LVDCR0_PWD; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); + } + + /* Wait for the startup delay. */ + usleep_range(100, 150); + + /* Turn the output on. */ + lvdcr0 |= LVDCR0_LVRES; + rcar_lvds_write(lvds, LVDCR0, lvdcr0); if (lvds->panel) { drm_panel_prepare(lvds->panel);