| Message ID | 20180208095326.15849-1-linus.walleij@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Linus Walleij <linus.walleij@linaro.org> writes: > These clocks are in kHz not in Hz, oops. Fix it so my > new bandwidth calculations patch starts working with these > panels. > > Cc: Eric Anholt <eric@anholt.net> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > drivers/gpu/drm/panel/panel-arm-versatile.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c > index 3930b4925b15..35707d0ae6b0 100644 > --- a/drivers/gpu/drm/panel/panel-arm-versatile.c > +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c > @@ -132,7 +132,7 @@ static const struct versatile_panel_type versatile_panels[] = { > .width_mm = 79, > .height_mm = 54, > .mode = { > - .clock = 10000000, > + .clock = 10000, > .hdisplay = 320, > .hsync_start = 320 + 6, > .hsync_end = 320 + 6 + 6, > @@ -156,7 +156,7 @@ static const struct versatile_panel_type versatile_panels[] = { > .width_mm = 171, > .height_mm = 130, > .mode = { > - .clock = 25000000, > + .clock = 25000, > .hdisplay = 640, > .hsync_start = 640 + 24, > .hsync_end = 640 + 24 + 96, > @@ -179,7 +179,7 @@ static const struct versatile_panel_type versatile_panels[] = { > .width_mm = 34, > .height_mm = 45, > .mode = { > - .clock = 625000000, > + .clock = 625000, 625000kHz still seems really suspicious. The fbdev driver does: clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000); which seems really strange to me -- set the clock rate lower as pixclock increases? What's going on here?
On Thu, Feb 8, 2018 at 11:50 AM, Eric Anholt <eric@anholt.net> wrote: >> - .clock = 625000000, >> + .clock = 625000, > > 625000kHz still seems really suspicious. Right, an order of magnitude typo on my part :( It is even correct in the fbdev driver. I sent a v2 fixing it. > The fbdev driver does: > > clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000); > > which seems really strange to me -- set the clock rate lower as pixclock > increases? What's going on here? That is regs.pixclock from struct clcd_regs in <linux/amba/clcd.h>, i.e. the register value of the pixel clock, not the mode info. So it makes sense: calculates the frequency in Hz and set that to the clock (the AUX oscillator, as this driver is not even making use of the clock divider). Yours, Linus Walleij
diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c index 3930b4925b15..35707d0ae6b0 100644 --- a/drivers/gpu/drm/panel/panel-arm-versatile.c +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c @@ -132,7 +132,7 @@ static const struct versatile_panel_type versatile_panels[] = { .width_mm = 79, .height_mm = 54, .mode = { - .clock = 10000000, + .clock = 10000, .hdisplay = 320, .hsync_start = 320 + 6, .hsync_end = 320 + 6 + 6, @@ -156,7 +156,7 @@ static const struct versatile_panel_type versatile_panels[] = { .width_mm = 171, .height_mm = 130, .mode = { - .clock = 25000000, + .clock = 25000, .hdisplay = 640, .hsync_start = 640 + 24, .hsync_end = 640 + 24 + 96, @@ -179,7 +179,7 @@ static const struct versatile_panel_type versatile_panels[] = { .width_mm = 34, .height_mm = 45, .mode = { - .clock = 625000000, + .clock = 625000, .hdisplay = 176, .hsync_start = 176 + 2, .hsync_end = 176 + 2 + 3, @@ -203,7 +203,7 @@ static const struct versatile_panel_type versatile_panels[] = { .width_mm = 37, .height_mm = 50, .mode = { - .clock = 5400000, + .clock = 5400, .hdisplay = 240, .hsync_start = 240 + 10, .hsync_end = 240 + 10 + 10,
These clocks are in kHz not in Hz, oops. Fix it so my new bandwidth calculations patch starts working with these panels. Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- drivers/gpu/drm/panel/panel-arm-versatile.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)