From patchwork Wed Feb 21 22:59:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10234287 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 020DB602A0 for ; Wed, 21 Feb 2018 23:00:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E97AE2863D for ; Wed, 21 Feb 2018 23:00:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DBECD285F2; Wed, 21 Feb 2018 23:00:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3BB32285DA for ; Wed, 21 Feb 2018 23:00:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 47AF06EB02; Wed, 21 Feb 2018 23:00:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id C81FE6EAFE; Wed, 21 Feb 2018 23:00:06 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 8CC6B60F91; Wed, 21 Feb 2018 22:59:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1519254006; bh=1rsiVD4kkx+5qLw13ImwO4z8aYN1mDylg83cbqcJeEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XCU1nW+injZEav9nBeFQY9nljm5wvDOlEUt9AFhAdiIfwORp46UIKMaFBEXQwCz52 osFhYRYWNtbXGaHRLzIeVBMgVo/zfmCBhI4/NuGW4ApO30+a/v5pl7K/UX4JqBXw4z d1AGcHZhEAz2UD0Mp6w4VxPpCF6pPjfUouQppGHE= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3E9FE60FB1; Wed, 21 Feb 2018 22:59:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1519253985; bh=1rsiVD4kkx+5qLw13ImwO4z8aYN1mDylg83cbqcJeEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rk0X3FA/IA7nTk05MWeinr+B/nNYu4ScwDwx4GGajiEOMgo1fmfUTw6LuJXOe3yfu +q/piO1UrwHCTW8Z5kHklHj1rS1XMqqe0xM0+MdXoqUjIJTIWOcjcTlls/ne2lRqck Yo4NHe9RMJhE/3mqAjlJJmX/FOihqfEqyiJkvBcA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3E9FE60FB1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Subject: [PATCH 09/14] drm/msm/gpu: Support using TTBR1 for kernel buffer objects Date: Wed, 21 Feb 2018 15:59:19 -0700 Message-Id: <20180221225924.30737-10-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180221225924.30737-1-jcrouse@codeaurora.org> References: <20180221225924.30737-1-jcrouse@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jean-philippe.brucker@arm.com, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, tfiga@chromium.org, iommu@lists.linux-foundation.org, vivek.gautam@codeaurora.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP arm-smmu based targets can support split pagetables (TTBR0/TTBR1). This is most useful for implementing per-instance pagetables so that the "user" pagetable can be swapped out while the "kernel" or "global" pagetable remains entact. if the target specifies a global virtual memory range then try to enable TTBR1 (the "global" pagetable) on the domain and and if successful use the global virtual memory range for allocations on the default GPU address space - this ensures that the global allocations make it into the right space. Per-instance pagetables still need additional support to be enabled but even if they aren't set up it isn't harmful to just use TTBR1 for all virtual memory regions and leave the other pagetable unused. If TTBR1 support isn't enabled then fall back to the "legacy" virtual address space both kernel and user. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/msm_gpu.c | 20 ++++++++++++++++++-- drivers/gpu/drm/msm/msm_gpu.h | 4 ++-- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 086fb347b554..94332faa316f 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -701,7 +701,8 @@ static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu) static struct msm_gem_address_space * msm_gpu_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev, - uint64_t va_start, uint64_t va_end) + u64 va_start, u64 va_end, + u64 va_global_start, u64 va_global_end) { struct iommu_domain *iommu; struct msm_gem_address_space *aspace; @@ -719,6 +720,20 @@ msm_gpu_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev, iommu->geometry.aperture_start = va_start; iommu->geometry.aperture_end = va_end; + /* If a va_global range was specified then try to set up TTBR1 */ + if (va_global_start && va_global_end) { + int val = 1; + + /* Try to enable TTBR1 on the domain */ + ret = iommu_domain_set_attr(iommu, DOMAIN_ATTR_ENABLE_TTBR1, + &val); + + if (!WARN(ret, "Unable to enable TTBR1 for the IOMMU\n")) { + iommu->geometry.aperture_start = va_global_start; + iommu->geometry.aperture_end = va_global_end; + } + } + dev_info(gpu->dev->dev, "%s: using IOMMU\n", gpu->name); aspace = msm_gem_address_space_create(&pdev->dev, iommu, "gpu"); @@ -811,7 +826,8 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, msm_devfreq_init(gpu); gpu->aspace = msm_gpu_create_address_space(gpu, pdev, - config->va_start, config->va_end); + config->va_start, config->va_end, config->va_start_global, + config->va_end_global); if (gpu->aspace == NULL) dev_info(drm->dev, "%s: no IOMMU, fallback to VRAM carveout!\n", name); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index fccfccd303af..698eca2c1431 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -31,8 +31,8 @@ struct msm_gpu_perfcntr; struct msm_gpu_config { const char *ioname; const char *irqname; - uint64_t va_start; - uint64_t va_end; + uint64_t va_start, va_end; + uint64_t va_start_global, va_end_global; unsigned int nr_rings; };