From patchwork Fri Mar 2 09:09:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10253835 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4E69C6037D for ; Fri, 2 Mar 2018 09:10:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B11E2880B for ; Fri, 2 Mar 2018 09:10:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3F55E288D1; Fri, 2 Mar 2018 09:10:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D40C62880B for ; Fri, 2 Mar 2018 09:10:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B93F66EE3C; Fri, 2 Mar 2018 09:10:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id E01286EE37 for ; Fri, 2 Mar 2018 09:09:59 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id i80so12370120lfg.5 for ; Fri, 02 Mar 2018 01:09:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=u3n+EdmT5VELmcOq1OsBnkTNl1hKW93SNHbVcS57YBE=; b=N2kG9vu8cgIgoDnLxCOPemcOxQu9GIV0CQbmcSEKWVNHEYbtPo7LnLih0RfwszJVNv NswRW9d2n9EkG0uWIU9d1CCs7Qvcg7qDcqsoUlzEWwmBmd+moL4zeNGvASHMWlTPGzxH BsWtOgKHfdixKouxcmBi8Igc1Z0ncq4Y28VAQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=u3n+EdmT5VELmcOq1OsBnkTNl1hKW93SNHbVcS57YBE=; b=ZKxIX1G18J57EtOAAjLvEkjWFJnp7iqRHOiF5OC7xb2HNzfZikVCCTGIy3DvEWyu1p k/BSXIKMH2iUcENTVL5Z/Ok9ap3cBlbkdwWCAbGrCoHZWU3kHfgft1ydL9sxrhHn7IBR nbbW4rX69mKNmpvmDzaiXG/WeWle1qxoPkkL3x51XKN0JC2OkkdbwgzWZ9OmU6MvBNLP Y4dKMzMzx4w5b1iQmxd/PgxLPubtht+67pdsQ6eA5zYwDxNb+QR9V83pGPEUCKmd4qhx GFD1BtcMB1Y/GFwnpKoeP43FvOTQksIImsAv98Xs5XEWAfWaKKIRZ8RKDI05tEofJBlQ +mFw== X-Gm-Message-State: AElRT7EVvaXAgOKjQoqnW6EG5NOzzAFodM+ZaHt56CRnJwUwxtl6AYEh L7EEEzH0VLnxl0YUxFQMcKLkbw== X-Google-Smtp-Source: AG47ELtEcm9OrwVq7FXnFqi9ghCsN7f8j7/5dFctj/vH955cRuooOhT396K8ycnpNatN9S+hp7NnYQ== X-Received: by 10.25.181.147 with SMTP id g19mr3653832lfk.47.1519981798210; Fri, 02 Mar 2018 01:09:58 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c63sm1242729lfg.82.2018.03.02.01.09.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 02 Mar 2018 01:09:57 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 2/4] drm/pl111: Use max memory bandwidth for resolution Date: Fri, 2 Mar 2018 10:09:46 +0100 Message-Id: <20180302090948.6399-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180302090948.6399-1-linus.walleij@linaro.org> References: <20180302090948.6399-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP We were previously selecting 1024x768 and 32BPP as the default set-up for the PL111 consumers. This does not work on elder systems: the device tree bindings support a property "max-memory-bandwidth" in bytes/second that states that if you exceed this the memory bus will saturate. The result is flickering and unstable images. Parse the "max-memory-bandwidth" and respect it when intializing the driver. On the RealView PB11MP, Versatile and Integrator/CP we get a nice console as default with this code. Signed-off-by: Linus Walleij Reviewed-by: Eric Anholt --- ChangeLog v2->v3: - Account for the case where there is no bandwidth limitation so priv->memory_bw is zero. Then just accept any modes. ChangeLog v1->v2: - Exploit the new .mode_valid() callback we added to the simple KMS helper. - Use the hardcoded bits per pixel per variant instead of trying to be heuristic about this setting for now. --- drivers/gpu/drm/pl111/pl111_display.c | 36 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_drm.h | 1 + drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ 3 files changed, 43 insertions(+) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index d75923896609..577e61950e16 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -50,6 +50,41 @@ irqreturn_t pl111_irq(int irq, void *data) return status; } +static enum drm_mode_status +pl111_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + struct drm_device *drm = crtc->dev; + struct pl111_drm_dev_private *priv = drm->dev_private; + u32 cpp = priv->variant->fb_bpp / 8; + u64 bw; + + /* + * We use the pixelclock to also account for interlaced modes, the + * resulting bandwidth is in bytes per second. + */ + bw = mode->clock * 1000; /* In Hz */ + bw = bw * mode->hdisplay * mode->vdisplay * cpp; + bw = div_u64(bw, mode->htotal * mode->vtotal); + + /* + * If no bandwidth constraints, anything goes, else + * check if we are too fast. + */ + if (priv->memory_bw && (bw > priv->memory_bw)) { + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_BAD; + } + DRM_INFO("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_OK; +} + static int pl111_display_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *pstate, struct drm_crtc_state *cstate) @@ -344,6 +379,7 @@ static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, } static const struct drm_simple_display_pipe_funcs pl111_display_funcs = { + .mode_valid = pl111_mode_valid, .check = pl111_display_check, .enable = pl111_display_enable, .disable = pl111_display_disable, diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 360fbdd2203c..70b092670c04 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -65,6 +65,7 @@ struct pl111_drm_dev_private { struct drm_simple_display_pipe pipe; void *regs; + u32 memory_bw; u32 ienb; u32 ctrl; /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 73d252351438..b469aa317d9d 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -262,6 +262,12 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", + &priv->memory_bw)) { + dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); + priv->memory_bw = 0; + } + /* The two variants swap this register */ if (variant->is_pl110) { priv->ienb = CLCD_PL110_IENB;