From patchwork Thu Apr 26 00:09:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zanoni, Paulo R" X-Patchwork-Id: 10364425 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 12A6A6038F for ; Thu, 26 Apr 2018 00:10:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 03E0F28FC3 for ; Thu, 26 Apr 2018 00:10:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EAC002904E; Thu, 26 Apr 2018 00:10:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A4FB92904E for ; Thu, 26 Apr 2018 00:10:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 94A906E5C9; Thu, 26 Apr 2018 00:10:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 362856E29C; Thu, 26 Apr 2018 00:10:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Apr 2018 17:10:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,328,1520924400"; d="scan'208";a="50863659" Received: from przanoni-mobl.jf.intel.com ([10.24.11.83]) by orsmga001.jf.intel.com with ESMTP; 25 Apr 2018 17:10:03 -0700 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Subject: [PATCH libdrm] intel: add support for ICL 11 Date: Wed, 25 Apr 2018 17:09:37 -0700 Message-Id: <20180426000937.25701-1-paulo.r.zanoni@intel.com> X-Mailer: git-send-email 2.14.3 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry , Lucas De Marchi , Paulo Zanoni , dri-devel@lists.freedesktop.org, Rodrigo Vivi MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the PCI IDs and the basic code to enable ICL. This is the current PCI ID list in our documentation. Kernel commit: d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs") v2: Michel provided a fix to IS_9XX that was broken by rebase bot. v3: Fix double definition of PCI IDs, update IDs according to bspec and keep them in the same order and rebase (Lucas) Cc: Michel Thierry Signed-off-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi Signed-off-by: Lucas De Marchi Reviewed-by: Michel Thierry --- intel/intel_bufmgr_gem.c | 2 ++ intel/intel_chipset.h | 27 ++++++++++++++++++++++++++- intel/intel_decode.c | 4 +++- 3 files changed, 31 insertions(+), 2 deletions(-) diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 5c47a46f..8c3a4b20 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -3660,6 +3660,8 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) bufmgr_gem->gen = 9; else if (IS_GEN10(bufmgr_gem->pci_device)) bufmgr_gem->gen = 10; + else if (IS_GEN11(bufmgr_gem->pci_device)) + bufmgr_gem->gen = 11; else { free(bufmgr_gem); bufmgr_gem = NULL; diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index ba2e3ac1..32b2c48f 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -257,6 +257,16 @@ #define PCI_CHIP_CANNONLAKE_12 0x5A44 #define PCI_CHIP_CANNONLAKE_13 0x5A4C +#define PCI_CHIP_ICELAKE_11_0 0x8A50 +#define PCI_CHIP_ICELAKE_11_1 0x8A51 +#define PCI_CHIP_ICELAKE_11_2 0x8A5C +#define PCI_CHIP_ICELAKE_11_3 0x8A5D +#define PCI_CHIP_ICELAKE_11_4 0x8A52 +#define PCI_CHIP_ICELAKE_11_5 0x8A5A +#define PCI_CHIP_ICELAKE_11_6 0x8A5B +#define PCI_CHIP_ICELAKE_11_7 0x8A71 +#define PCI_CHIP_ICELAKE_11_8 0x8A70 + #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ (devid) == PCI_CHIP_I945_GM || \ @@ -538,6 +548,20 @@ #define IS_GEN10(devid) (IS_CANNONLAKE(devid)) +#define IS_ICELAKE_11(devid) ((devid) == PCI_CHIP_ICELAKE_11_0 || \ + (devid) == PCI_CHIP_ICELAKE_11_1 || \ + (devid) == PCI_CHIP_ICELAKE_11_2 || \ + (devid) == PCI_CHIP_ICELAKE_11_3 || \ + (devid) == PCI_CHIP_ICELAKE_11_4 || \ + (devid) == PCI_CHIP_ICELAKE_11_5 || \ + (devid) == PCI_CHIP_ICELAKE_11_6 || \ + (devid) == PCI_CHIP_ICELAKE_11_7 || \ + (devid) == PCI_CHIP_ICELAKE_11_8) + +#define IS_ICELAKE(devid) (IS_ICELAKE_11(devid)) + +#define IS_GEN11(devid) (IS_ICELAKE_11(devid)) + #define IS_9XX(dev) (IS_GEN3(dev) || \ IS_GEN4(dev) || \ IS_GEN5(dev) || \ @@ -545,6 +569,7 @@ IS_GEN7(dev) || \ IS_GEN8(dev) || \ IS_GEN9(dev) || \ - IS_GEN10(dev)) + IS_GEN10(dev) || \ + IS_GEN11(dev)) #endif /* _INTEL_CHIPSET_H */ diff --git a/intel/intel_decode.c b/intel/intel_decode.c index bc7b04b8..b24861b1 100644 --- a/intel/intel_decode.c +++ b/intel/intel_decode.c @@ -3823,7 +3823,9 @@ drm_intel_decode_context_alloc(uint32_t devid) ctx->devid = devid; ctx->out = stdout; - if (IS_GEN10(devid)) + if (IS_GEN11(devid)) + ctx->gen = 11; + else if (IS_GEN10(devid)) ctx->gen = 10; else if (IS_GEN9(devid)) ctx->gen = 9;