Message ID | 20180518094536.17201-16-jagan@amarulasolutions.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 1a5ff416dea4..4f7b9dca8ca0 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -104,6 +104,7 @@ Required properties: - compatible: value must be one of: * allwinner,sun8i-a83t-hdmi-phy * allwinner,sun8i-h3-hdmi-phy + * allwinner,sun50i-a64-hdmi-phy - reg: base address and size of memory-mapped region - clocks: phandles to the clocks feeding the HDMI PHY * bus: the HDMI PHY interface clock
HDMI PHY on Allwinner A64 has similar like H3/H5 but with two clock parents, so add separate compatible for A64. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v2: - Add separate compatible for A64 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + 1 file changed, 1 insertion(+)