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[210.140.84.216]) by smtp.gmail.com with ESMTPSA id l63-v6sm18609187pfi.6.2018.05.18.23.53.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 May 2018 23:53:13 -0700 (PDT) From: Qiang Yu To: dri-devel@lists.freedesktop.org Subject: [PATCH RFC 01/24] ARM: dts: add gpu node to exynos4 Date: Sat, 19 May 2018 14:52:20 +0800 Message-Id: <20180519065243.27600-2-yuq825@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180519065243.27600-1-yuq825@gmail.com> References: <20180519065243.27600-1-yuq825@gmail.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Simon Shields , Marek Vasut , Connor Abbott , Neil Armstrong , Andrei Paulau <7134956@gmail.com>, Vasily Khoruzhick , Qiang Yu , Erico Nunes MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Simon Shields v2 (Qiang Yu): add vender string to exynos4 mali gpu Based off a similar commit for the Samsung Mali driver by Tobias Jakobi Signed-off-by: Simon Shields Signed-off-by: Qiang Yu --- arch/arm/boot/dts/exynos4.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 909a9f2bf5be..7509671c505e 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -731,6 +731,39 @@ status = "disabled"; }; + gpu: gpu@13000000 { + compatible = "samsung,exynos4-mali", "arm,mali-400"; + reg = <0x13000000 0x30000>; + power-domains = <&pd_g3d>; + + /* + * Propagate VPLL output clock to SCLK_G3D and + * ensure that the DIV_G3D divider is 1. + */ + assigned-clocks = <&clock CLK_MOUT_G3D1>, <&clock CLK_MOUT_G3D>, + <&clock CLK_FOUT_VPLL>, <&clock CLK_SCLK_G3D>; + assigned-clock-parents = <&clock CLK_SCLK_VPLL>, + <&clock CLK_MOUT_G3D1>; + assigned-clock-rates = <0>, <0>, <160000000>, <160000000>; + + clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>; + clock-names = "bus", "core"; + + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ppmmu0", "ppmmu1", "ppmmu2", "ppmmu3", + "gpmmu", "pp0", "pp1", "pp2", "pp3", "gp"; + status = "disabled"; + }; + tmu: tmu@100c0000 { interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>;