From patchwork Mon Jun 18 10:28:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 10470831 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C8EF3601D7 for ; Mon, 18 Jun 2018 10:29:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B87312894B for ; Mon, 18 Jun 2018 10:29:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AD1E92895A; Mon, 18 Jun 2018 10:29:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 323182894B for ; Mon, 18 Jun 2018 10:29:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F29C6E3B9; Mon, 18 Jun 2018 10:28:32 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from gloria.sntech.de (gloria.sntech.de [95.129.55.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 871DA6E3B3 for ; Mon, 18 Jun 2018 10:28:21 +0000 (UTC) Received: from wd0897.dip.tu-dresden.de ([141.76.111.129] helo=phil.dip.tu-dresden.de) by gloria.sntech.de with esmtpsa (TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1fUrOW-0003Hw-18; Mon, 18 Jun 2018 12:28:20 +0200 From: Heiko Stuebner To: dri-devel@lists.freedesktop.org Subject: [PATCH v2 8/8] drm/rockchip: dsi: add dual mipi support Date: Mon, 18 Jun 2018 12:28:06 +0200 Message-Id: <20180618102806.15650-9-heiko@sntech.de> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180618102806.15650-1-heiko@sntech.de> References: <20180618102806.15650-1-heiko@sntech.de> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, briannorris@chromium.org, hoegsberg@gmail.com, philippe.cornu@st.com, yannick.fertre@st.com, linux-rockchip@lists.infradead.org, nickey.yang@rock-chips.com, robh+dt@kernel.org, thierry.reding@gmail.com, laurent.pinchart@ideasonboard.com, mka@chromium.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the Rockchip-sepcific dual-dsi setup and hook it into the VOP as well. As described in the general dual-dsi devicetree binding, the panel should define two input ports and point each of them to one of the used dsi- controllers, as well as declare one of them as clock-master. This is used to determine the dual-dsi state and get access to both controller instances. Signed-off-by: Heiko Stuebner --- .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 67 ++++++++++++++++++- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 1 + drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 + drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 4 ++ drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 + 5 files changed, 75 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index 12e4dacc7970..3382ad5a1b0d 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -218,6 +218,10 @@ struct dw_mipi_dsi_rockchip { struct clk *grf_clk; struct clk *phy_cfg_clk; + /* dual-channel */ + bool is_slave; + struct dw_mipi_dsi_rockchip *slave; + unsigned int lane_mbps; /* per lane */ u16 input_div; u16 feedback_div; @@ -604,6 +608,8 @@ static void dw_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder, } dw_mipi_dsi_rockchip_config(dsi, mux); + if (dsi->slave) + dw_mipi_dsi_rockchip_config(dsi->slave, mux); clk_disable_unprepare(dsi->grf_clk); } @@ -632,6 +638,8 @@ dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder, } s->output_type = DRM_MODE_CONNECTOR_DSI; + if (dsi->slave) + s->output_flags = ROCKCHIP_OUTPUT_DSI_DUAL; return 0; } @@ -641,6 +649,8 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); pm_runtime_put(dsi->dev); + if (dsi->slave) + pm_runtime_put(dsi->slave->dev); } static const struct drm_encoder_helper_funcs @@ -681,18 +691,70 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, { struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); struct drm_device *drm_dev = data; + struct device_node *second_np; struct drm_bridge *bridge; struct drm_panel *panel; + bool master1, master2; int ret; /* - * Handle probe-deferrals due to missing display. + * At this point both DSIs (if in use) should have probed and found + * any connected displays or bridges. + * This also takes care of handling possible probe-deferrals. */ ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0, &panel, &bridge); if (ret) return ret; + second_np = of_mipi_dsi_find_second_host(dsi->dev->of_node, 1, 0); + if (IS_ERR(second_np)) + return PTR_ERR(second_np); + + if (second_np) { + struct platform_device *pdev; + + master1 = of_property_read_bool(dsi->dev->of_node, + "clock-master"); + master2 = of_property_read_bool(second_np, "clock-master"); + + if (master1 && master2) { + DRM_DEV_ERROR(dsi->dev, "only one clock-master allowed\n"); + of_node_put(second_np); + return -EINVAL; + } + + if (!master1 && !master2) { + DRM_DEV_ERROR(dsi->dev, "no clock-master defined\n"); + of_node_put(second_np); + return -EINVAL; + } + + /* we are the slave in dual-DSI */ + if (!master1) { + dsi->is_slave = true; + of_node_put(second_np); + return 0; + } + + pdev = of_find_device_by_node(second_np); + if (!pdev) { + DRM_DEV_ERROR(dev, "could not find slave controller\n"); + return -ENODEV; + } + + dsi->slave = platform_get_drvdata(pdev); + if (!dsi->slave) { + DRM_DEV_ERROR(dev, "could not get slaves platform-data\n"); + return -ENODEV; + } + + dsi->slave->is_slave = true; + dw_mipi_dsi_set_slave(dsi->dmd, dsi->slave->dmd); + + of_node_put(second_np); + } + ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); if (ret) { DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); @@ -714,6 +776,9 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev, { struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); + if (dsi->is_slave) + return; + dw_mipi_dsi_unbind(dsi->dmd); } diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 96bb4ca8febf..2e6d2d4d1b65 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -37,6 +37,7 @@ struct rockchip_crtc_state { int output_type; int output_mode; int output_bpc; + int output_flags; }; #define to_rockchip_crtc_state(s) \ container_of(s, struct rockchip_crtc_state, base) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d105e984cf09..9b2fa5e0eade 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -916,6 +916,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIT(VSYNC_POSITIVE) : 0; VOP_REG_SET(vop, output, pin_pol, pin_pol); + VOP_REG_SET(vop, output, mipi_dual_channel_en, 0); switch (s->output_type) { case DRM_MODE_CONNECTOR_LVDS: @@ -933,6 +934,8 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, case DRM_MODE_CONNECTOR_DSI: VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol); VOP_REG_SET(vop, output, mipi_en, 1); + VOP_REG_SET(vop, output, mipi_dual_channel_en, + !!(s->output_flags & ROCKCHIP_OUTPUT_DSI_DUAL)); break; case DRM_MODE_CONNECTOR_DisplayPort: pin_pol &= ~BIT(DCLK_INVERT); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 084acdd0019a..63c815edeaac 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -60,6 +60,7 @@ struct vop_output { struct vop_reg edp_en; struct vop_reg hdmi_en; struct vop_reg mipi_en; + struct vop_reg mipi_dual_channel_en; struct vop_reg rgb_en; }; @@ -213,6 +214,9 @@ struct vop_data { /* for use special outface */ #define ROCKCHIP_OUT_MODE_AAAA 15 +/* output flags */ +#define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0) + enum alpha_mode { ALPHA_STRAIGHT, ALPHA_INVERSE, diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 08023d3ecb76..56d83f1c2599 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -421,6 +421,7 @@ static const struct vop_output rk3399_output = { .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), + .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3), }; static const struct vop_data rk3399_vop_big = {