From patchwork Thu Jul 26 20:30:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10546435 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1491180E for ; Thu, 26 Jul 2018 20:30:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AD1FF2B7DE for ; Thu, 26 Jul 2018 20:30:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A1B4D2B808; Thu, 26 Jul 2018 20:30:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1284F2B7DE for ; Thu, 26 Jul 2018 20:30:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B7D96E855; Thu, 26 Jul 2018 20:30:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 170646E847; Thu, 26 Jul 2018 20:30:24 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E965A60BE8; Thu, 26 Jul 2018 20:30:23 +0000 (UTC) Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 807BE60B83; Thu, 26 Jul 2018 20:30:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 807BE60B83 From: Jordan Crouse To: freedreno@lists.freedesktop.org Subject: [PATCH 5/5] drm/msm/disp/dpu: Mark a handful of functions as static Date: Thu, 26 Jul 2018 14:30:14 -0600 Message-Id: <20180726203014.3270-6-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180726203014.3270-1-jcrouse@codeaurora.org> References: <20180726203014.3270-1-jcrouse@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Mark a number of static functions that are only unsed in the file that defines them and remove the prototypes from the headers where needed. Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 7 +++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 6 ------ .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 14 -------------- .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h | 17 ----------------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 2 +- 11 files changed, 13 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 5c0051af5e98..0bd3eda93e22 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -264,6 +264,9 @@ void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc, DPU_ENCODER_FRAME_EVENT_ERROR); } +static int dpu_encoder_helper_wait_event_timeout(int32_t drm_id, + int32_t hw_id, struct dpu_encoder_wait_info *info); + int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, enum dpu_intr_idx intr_idx, struct dpu_encoder_wait_info *wait_info) @@ -467,7 +470,7 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, } } -void dpu_encoder_destroy(struct drm_encoder *drm_enc) +static void dpu_encoder_destroy(struct drm_encoder *drm_enc) { struct dpu_encoder_virt *dpu_enc = NULL; int i = 0; @@ -1516,7 +1519,7 @@ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc) } } -int dpu_encoder_helper_wait_event_timeout( +static int dpu_encoder_helper_wait_event_timeout( int32_t drm_id, int32_t hw_id, struct dpu_encoder_wait_info *info) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 204e538b0b74..60f809fc7c13 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -158,12 +158,6 @@ struct drm_encoder *dpu_encoder_init( int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, struct msm_display_info *disp_info); -/** - * dpu_encoder_destroy - destroy previously initialized virtual encoder - * @drm_enc: Pointer to previously created drm encoder structure - */ -void dpu_encoder_destroy(struct drm_encoder *drm_enc); - /** * dpu_encoder_prepare_commit - prepare encoder at the very beginning of an * atomic commit, before any registers are written diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index dacec1c8eeeb..c7df8aad6613 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -355,20 +355,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( */ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc); -/** - * dpu_encoder_helper_wait_event_timeout - wait for event with timeout - * taking into account that jiffies may jump between reads leading to - * incorrectly detected timeouts. Prevent failure in this scenario by - * making sure that elapsed time during wait is valid. - * @drm_id: drm object id for logging - * @hw_id: hw instance id for logging - * @info: wait info structure - */ -int dpu_encoder_helper_wait_event_timeout( - int32_t drm_id, - int32_t hw_id, - struct dpu_encoder_wait_info *info); - /** * dpu_encoder_helper_hw_reset - issue ctl hw reset * This helper function may be optionally specified by physical diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index e6d02c6947b4..3084675ed425 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -349,7 +349,7 @@ static int dpu_encoder_phys_cmd_control_vblank_irq( return ret; } -void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc, +static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc, bool enable) { struct dpu_encoder_phys_cmd *cmd_enc; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 0cb00612f96f..bfcd165e96df 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -846,7 +846,7 @@ static int _dpu_format_get_plane_sizes_linear( return 0; } -int dpu_format_get_plane_sizes( +static int dpu_format_get_plane_sizes( const struct dpu_format *fmt, const uint32_t w, const uint32_t h, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h index b3a6592f1a8a..a54451d8d011 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h @@ -55,23 +55,6 @@ uint32_t dpu_populate_formats( uint32_t pixel_formats_max); /** - * dpu_format_get_plane_sizes - calculate size and layout of given buffer format - * @fmt: pointer to dpu_format - * @w: width of the buffer - * @h: height of the buffer - * @layout: layout of the buffer - * @pitches: array of size [DPU_MAX_PLANES] to populate - * pitch for each plane - * - * Return: size of the buffer - */ -int dpu_format_get_plane_sizes( - const struct dpu_format *fmt, - const uint32_t w, - const uint32_t h, - struct dpu_hw_fmt_layout *layout, - const uint32_t *pitches); - * dpu_format_check_modified_format - validate format and buffers for * dpu non-standard, i.e. modified format * @kms: kms driver diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 1793cfd29a07..44ee06398b1d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -449,7 +449,7 @@ static struct dpu_perf_cfg sdm845_perf_data = { * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets * and instance counts. */ -void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) +static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) { *dpu_cfg = (struct dpu_mdss_cfg){ .caps = &sdm845_dpu_caps, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c index da6f0609be5f..554874ba0c3b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c @@ -217,7 +217,7 @@ static int dpu_hw_cdm_setup_cdwn(struct dpu_hw_cdm *ctx, return 0; } -int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, +static int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, struct dpu_hw_cdm_cfg *cdm) { struct dpu_hw_blk_reg_map *c = &ctx->hw; @@ -249,7 +249,7 @@ int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, return 0; } -void dpu_hw_cdm_disable(struct dpu_hw_cdm *ctx) +static void dpu_hw_cdm_disable(struct dpu_hw_cdm *ctx) { struct cdm_output_cfg cdm_cfg = { 0 }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c index 42fc72cf48dd..db2798e862fc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c @@ -275,7 +275,7 @@ static void dpu_hw_get_safe_status(struct dpu_hw_mdp *mdp, status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x1; } -void dpu_hw_reset_ubwc(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m) +static void dpu_hw_reset_ubwc(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m) { struct dpu_hw_blk_reg_map c; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 1c0838801e78..7dd6bd2d6d37 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -819,7 +819,7 @@ static int dpu_kms_pm_resume(struct device *dev) return 0; } -void _dpu_kms_set_encoder_mode(struct msm_kms *kms, +static void _dpu_kms_set_encoder_mode(struct msm_kms *kms, struct drm_encoder *encoder, bool cmd_mode) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c index 6dfc26698a09..9e533b86682c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c @@ -115,7 +115,7 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss) return 0; } -int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss) +static int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss) { if (dpu_mdss->irq_controller.domain) { irq_domain_remove(dpu_mdss->irq_controller.domain);