From patchwork Mon Aug 27 15:11:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10577325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A8985920 for ; Mon, 27 Aug 2018 15:11:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96E2C29B54 for ; Mon, 27 Aug 2018 15:11:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A8CA29B74; Mon, 27 Aug 2018 15:11:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0708D29B54 for ; Mon, 27 Aug 2018 15:11:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B55E6E24F; Mon, 27 Aug 2018 15:11:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1FA5B6E24F; Mon, 27 Aug 2018 15:11:51 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B62D860B77; Mon, 27 Aug 2018 15:11:30 +0000 (UTC) Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A5AB960C4C; Mon, 27 Aug 2018 15:11:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A5AB960C4C From: Jordan Crouse To: freedreno@lists.freedesktop.org, georgi.djakov@linaro.org Subject: [PATCH 9/9] arm64: dts: Add interconnect for the GPU on SDM845 Date: Mon, 27 Aug 2018 09:11:12 -0600 Message-Id: <20180827151112.25211-10-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180827151112.25211-1-jcrouse@codeaurora.org> References: <20180827151112.25211-1-jcrouse@codeaurora.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, bjorn.andersson@linaro.org, vireshk@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add the interconnect properties for the GPU on SDM845 and set the corresponding OPP bandwidth values. Signed-off-by: Jordan Crouse --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 10db0ceb3699..1e67f4fdd7d1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -198,36 +198,43 @@ gpu_opp_table: adreno-opp-table { opp-710000000 { opp-hz = /bits/ 64 <710000000>; qcom,level = <416>; + opp-interconnect-bw-port0 = /bits/ 64 <0 7216000000>; }; opp-675000000 { opp-hz = /bits/ 64 <675000000>; qcom,level = <384>; + opp-interconnect-bw-port0 = /bits/ 64 <0 7216000000>; }; opp-596000000 { opp-hz = /bits/ 64 <596000000>; qcom,level = <320>; + opp-interconnect-bw-port0 = /bits/ 64 <0 5184000000>; }; opp-520000000 { opp-hz = /bits/ 64 <520000000>; qcom,level = <256>; + opp-interconnect-bw-port0 = /bits/ 64 <0 4068000000>; }; opp-414000000 { opp-hz = /bits/ 64 <414000000>; qcom,level = <192>; + opp-interconnect-bw-port0 = /bits/ 64 <0 3072000000>; }; opp-342000000 { opp-hz = /bits/ 64 <342000000>; qcom,level = <128>; + opp-interconnect-bw-port0 = /bits/ 64 <0 2188000000>; }; opp-257000000 { opp-hz = /bits/ 64 <257000000>; qcom,level = <64>; + opp-interconnect-bw-port0 = /bits/ 64 <0 1200000000>; }; }; @@ -418,6 +425,9 @@ gpu_opp_table: adreno-opp-table { operating-points-v2 = <&gpu_opp_table>; + interconnects = <&qnoc 26 &qnoc 512>; + interconnect-names = "port0"; + qcom,gmu = <&gmu>; };