@@ -69,7 +69,10 @@ struct nv50_disp_sor_hdmi_pwr_v0 {
__u8 rekey;
__u8 avi_infoframe_length;
__u8 vendor_infoframe_length;
- __u8 pad06[2];
+#define NV50_DISP_SOR_HDMI_PWR_V0_SCDC_SCRAMBLE (1 << 0)
+#define NV50_DISP_SOR_HDMI_PWR_V0_SCDC_DIV_BY_4 (1 << 1)
+ __u8 scdc;
+ __u8 pad07[1];
};
struct nv50_disp_sor_lvds_script_v0 {
@@ -60,6 +60,7 @@ struct nvkm_ior_func {
void (*ctrl)(struct nvkm_ior *, int head, bool enable,
u8 max_ac_packet, u8 rekey, u8 *avi, u8 avi_size,
u8 *vendor, u8 vendor_size);
+ void (*scdc)(struct nvkm_ior *, int head, u8 scdc);
} hdmi;
struct {
@@ -176,9 +176,10 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size);
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d "
- "max_ac_packet %d rekey %d\n",
+ "max_ac_packet %d rekey %d scdc %d\n",
args->v0.version, args->v0.state,
- args->v0.max_ac_packet, args->v0.rekey);
+ args->v0.max_ac_packet, args->v0.rekey,
+ args->v0.scdc);
if (args->v0.max_ac_packet > 0x1f || args->v0.rekey > 0x7f)
return -EINVAL;
if ((args->v0.avi_infoframe_length
@@ -202,6 +203,11 @@ nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
args->v0.max_ac_packet,
args->v0.rekey, avi, avi_size,
vendor, vendor_size);
+
+ if (outp->ior->func->hdmi.scdc)
+ outp->ior->func->hdmi.scdc(
+ outp->ior, hidx, args->v0.scdc);
+
return 0;
}
break;
High pixel clocks are required to use a 40 TMDS divider instead of 10, and even low ones may optionally use scrambling depending on device support. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> --- drivers/gpu/drm/nouveau/include/nvif/cl5070.h | 5 ++++- drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | 1 + drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c | 10 ++++++++-- 3 files changed, 13 insertions(+), 3 deletions(-)