diff mbox series

[v2,04/29] clk: sunxi-ng: h6: Set video PLLs limits

Message ID 20181007093905.11253-5-jernej.skrabec@siol.net (mailing list archive)
State New, archived
Headers show
Series Allwinner H6 DE3 and HDMI support | expand

Commit Message

Jernej Škrabec Oct. 7, 2018, 9:38 a.m. UTC
Video PLL factors can be set in a way that final PLL rate is outside
stable range. H6 user manual specifically says that N factor should not
be below 12. While it doesn't says anything about maximum stable rate, it
is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).

Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
to 2.4 GHz, which is maximum in BSP driver.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
 drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Jagan Teki Oct. 12, 2018, 8:13 a.m. UTC | #1
On Sunday 07 October 2018 03:08 PM, Jernej Skrabec wrote:
> Video PLL factors can be set in a way that final PLL rate is outside
> stable range. H6 user manual specifically says that N factor should not
> be below 12. While it doesn't says anything about maximum stable rate, it

Manual says "In application, PLL_FACTOR_N should be more than or equal 
to 11" can't it be 11?

> is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).
> 
> Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
> to 2.4 GHz, which is maximum in BSP driver.

Is this max freq from here [1]

[1] 
https://github.com/Allwinner-Homlet/H6-BSP4.9-linux/blob/master/drivers/clk/sunxi/clk-sun50iw6.c#L164
Chen-Yu Tsai Oct. 12, 2018, 9:03 a.m. UTC | #2
On Fri, Oct 12, 2018 at 4:14 PM Jagan Teki <jagan@openedev.com> wrote:
>
> On Sunday 07 October 2018 03:08 PM, Jernej Skrabec wrote:
> > Video PLL factors can be set in a way that final PLL rate is outside
> > stable range. H6 user manual specifically says that N factor should not
> > be below 12. While it doesn't says anything about maximum stable rate, it
>
> Manual says "In application, PLL_FACTOR_N should be more than or equal
> to 11" can't it be 11?

PLL_FACTOR_N is the raw value, which starts from 0.
That translates to an actual factor of 12 used in the calculations.

> > is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).
> >
> > Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
> > to 2.4 GHz, which is maximum in BSP driver.
>
> Is this max freq from here [1]
>
> [1]
> https://github.com/Allwinner-Homlet/H6-BSP4.9-linux/blob/master/drivers/clk/sunxi/clk-sun50iw6.c#L164
>
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diff mbox series

Patch

diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index 2193e1495086..19ff09f610e4 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -120,6 +120,8 @@  static struct ccu_nm pll_video0_clk = {
 	.n		= _SUNXI_CCU_MULT_MIN(8, 8, 12),
 	.m		= _SUNXI_CCU_DIV(1, 1), /* input divider */
 	.fixed_post_div	= 4,
+	.min_rate	= 288000000,
+	.max_rate	= 2400000000UL,
 	.common		= {
 		.reg		= 0x040,
 		.features	= CCU_FEATURE_FIXED_POSTDIV,
@@ -136,6 +138,8 @@  static struct ccu_nm pll_video1_clk = {
 	.n		= _SUNXI_CCU_MULT_MIN(8, 8, 12),
 	.m		= _SUNXI_CCU_DIV(1, 1), /* input divider */
 	.fixed_post_div	= 4,
+	.min_rate	= 288000000,
+	.max_rate	= 2400000000UL,
 	.common		= {
 		.reg		= 0x048,
 		.features	= CCU_FEATURE_FIXED_POSTDIV,