From patchwork Fri Oct 12 16:35:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru-Cosmin Gheorghe X-Patchwork-Id: 10638857 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4A0E7157A for ; Fri, 12 Oct 2018 16:36:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 386F22BEEE for ; Fri, 12 Oct 2018 16:36:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2C2DD2BF8D; Fri, 12 Oct 2018 16:36:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B791B2BEEE for ; Fri, 12 Oct 2018 16:36:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E082E6E4C9; Fri, 12 Oct 2018 16:36:31 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-ve1eur02on062f.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe06::62f]) by gabe.freedesktop.org (Postfix) with ESMTPS id 40F8F6E4C5 for ; Fri, 12 Oct 2018 16:36:29 +0000 (UTC) Received: from e114479-lin.cambridge.arm.com (217.140.106.51) by AM5PR0802MB2545.eurprd08.prod.outlook.com (2603:10a6:203:a0::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1228.24; Fri, 12 Oct 2018 16:36:27 +0000 From: Alexandru Gheorghe To: seanpaul@chromium.org, airlied@linux.ie, dri-devel@lists.freedesktop.org, liviu.dudau@arm.com, brian.starkey@arm.com, malidp@foss.arm.com, gustavo@padovan.org, maarten.lankhorst@linux.intel.com, ayan.halder@arm.com, daniel.vetter@ffwll.ch, raymond.smith@arm.com, david.garbett@arm.com, lisa.wu@arm.com, matt.szczesiak@arm.com, charles.xu@arm.com, james.qian.wang@arm.com Subject: [PATCH v4 4/9] drm: mali-dp: Enable Mali-DP tiled buffer formats Date: Fri, 12 Oct 2018 17:35:55 +0100 Message-Id: <20181012163600.20331-5-alexandru-cosmin.gheorghe@arm.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181012163600.20331-1-alexandru-cosmin.gheorghe@arm.com> References: <20181012163600.20331-1-alexandru-cosmin.gheorghe@arm.com> MIME-Version: 1.0 X-Originating-IP: [217.140.106.51] X-ClientProxiedBy: CWLP265CA0200.GBRP265.PROD.OUTLOOK.COM (2603:10a6:401:4e::20) To AM5PR0802MB2545.eurprd08.prod.outlook.com (2603:10a6:203:a0::21) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0d6d501c-b126-4c71-292a-08d63060db86 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0; 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+static const struct malidp_format_id malidp650_de_formats[] = { + MALIDP_COMMON_FORMATS, + { DRM_FORMAT_X0L0, DE_VIDEO1 | DE_VIDEO2, MALIDP_ID(5, 4)}, +}; + static const struct malidp_layer malidp500_layers[] = { { DE_VIDEO1, MALIDP500_DE_LV_BASE, MALIDP500_DE_LV_PTR_BASE, MALIDP_DE_LV_STRIDE0, MALIDP500_LV_YUV2RGB }, { DE_GRAPHICS1, MALIDP500_DE_LG1_BASE, MALIDP500_DE_LG1_PTR_BASE, MALIDP_DE_LG_STRIDE, 0 }, @@ -595,6 +601,8 @@ static int malidp550_rotmem_required(struct malidp_hw_device *hwdev, u16 w, u16 case DRM_FORMAT_BGR565: case DRM_FORMAT_UYVY: case DRM_FORMAT_YUYV: + case DRM_FORMAT_X0L0: + case DRM_FORMAT_X0L2: bytes_per_col = 32; break; /* 16 lines at 1.5 bytes per pixel */ @@ -860,8 +868,8 @@ const struct malidp_hw malidp_device[MALIDP_MAX_DEVICES] = { MALIDP550_DC_IRQ_SE, .vsync_irq = MALIDP550_DC_IRQ_CONF_VALID, }, - .pixel_formats = malidp550_de_formats, - .n_pixel_formats = ARRAY_SIZE(malidp550_de_formats), + .pixel_formats = malidp650_de_formats, + .n_pixel_formats = ARRAY_SIZE(malidp650_de_formats), .bus_align_bytes = 16, }, .query_hw = malidp650_query_hw, diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 49c37f6dd63e..33bbc29da774 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -196,13 +196,26 @@ static int malidp_de_plane_check(struct drm_plane *plane, ms->n_planes = fb->format->num_planes; for (i = 0; i < ms->n_planes; i++) { u8 alignment = malidp_hw_get_pitch_align(mp->hwdev, rotated); - if (fb->pitches[i] & (alignment - 1)) { + + if ((fb->pitches[i] * drm_format_info_block_height(fb->format, i)) + & (alignment - 1)) { DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n", fb->pitches[i], i); return -EINVAL; } } + if (fb->width % drm_format_info_block_width(fb->format, 0) || + fb->height % drm_format_info_block_height(fb->format, 0)) { + DRM_DEBUG_KMS("Buffer width/height needs to be a multiple of tile sizes"); + return -EINVAL; + } + if ((state->src_x >> 16) % drm_format_info_block_width(fb->format, 0) || + (state->src_y >> 16) % drm_format_info_block_height(fb->format, 0)) { + DRM_DEBUG_KMS("Plane src_x/src_y needs to be a multiple of tile sizes"); + return -EINVAL; + } + if ((state->crtc_w > mp->hwdev->max_line_size) || (state->crtc_h > mp->hwdev->max_line_size) || (state->crtc_w < mp->hwdev->min_line_size) || @@ -258,8 +271,14 @@ static void malidp_de_set_plane_pitches(struct malidp_plane *mp, num_strides = (mp->hwdev->hw->features & MALIDP_DEVICE_LV_HAS_3_STRIDES) ? 3 : 2; + /* + * The drm convention for pitch is that it needs to cover width * cpp, + * but our hardware wants the pitch/stride to cover all rows included + * in a tile. + */ for (i = 0; i < num_strides; ++i) - malidp_hw_write(mp->hwdev, pitches[i], + malidp_hw_write(mp->hwdev, pitches[i] * + drm_format_info_block_height(mp->base.state->fb->format, i), mp->layer->base + mp->layer->stride_offset + i * 4); }