From patchwork Fri Nov 2 05:41:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 10664969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EB8013B5 for ; Fri, 2 Nov 2018 05:48:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 252102A204 for ; Fri, 2 Nov 2018 05:48:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 197072AD45; Fri, 2 Nov 2018 05:48:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C961B2A204 for ; Fri, 2 Nov 2018 05:48:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D28BA6E482; Fri, 2 Nov 2018 05:48:02 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 594AF6E463; Fri, 2 Nov 2018 05:47:59 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Nov 2018 22:47:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,454,1534834800"; d="scan'208";a="86120163" Received: from anusha.jf.intel.com ([10.7.198.74]) by orsmga007.jf.intel.com with ESMTP; 01 Nov 2018 22:47:59 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Subject: [v5 4/6] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION Date: Thu, 1 Nov 2018 22:41:57 -0700 Message-Id: <20181102054159.28886-5-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181102054159.28886-1-anusha.srivatsa@intel.com> References: <20181102054159.28886-1-anusha.srivatsa@intel.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anusha Srivatsa , Manasi Navare , dri-devel@lists.freedesktop.org, Gaurav K Singh MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP If the panel supports FEC, the driver has to set the FEC_READY bit in the dpcd register: FEC_CONFIGURATION. This has to happen before link training. v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready - change commit message. (Gaurav) v3: rebased. (r-b Manasi) v4: Use fec crtc state, before setting FEC_READY bit. (Anusha) v5: Move to intel_ddi.c - Make the function static (Anusha) Cc: dri-devel@lists.freedesktop.org Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 1de0a3917d7f..05b6ffeb13be 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2889,6 +2889,20 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder) } } +static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int state) +{ + int ret; + + if (!crtc_state->fec_enable) + return; + + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state); + if (ret < 0) + DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n"); +} + static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) @@ -2932,6 +2946,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp_sink_set_decompression_state(intel_dp, crtc_state, DP_DECOMPRESSION_EN); + intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY); intel_dp_start_link_train(intel_dp); if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp);