From patchwork Wed Nov 14 01:52:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 10681813 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA5A614E2 for ; Wed, 14 Nov 2018 01:50:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B20022B31B for ; Wed, 14 Nov 2018 01:50:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A69822B347; Wed, 14 Nov 2018 01:50:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 62E632B31B for ; Wed, 14 Nov 2018 01:50:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CDD236E42B; Wed, 14 Nov 2018 01:50:13 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 29AFC6E42A; Wed, 14 Nov 2018 01:50:12 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2018 17:50:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,230,1539673200"; d="scan'208";a="279622607" Received: from labuser-z97x-ud5h.jf.intel.com ([10.54.75.151]) by fmsmga005.fm.intel.com with ESMTP; 13 Nov 2018 17:50:11 -0800 From: Manasi Navare To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v9 01/24] drm/dsc: Modify DRM helper to return complete DSC color depth capabilities Date: Tue, 13 Nov 2018 17:52:09 -0800 Message-Id: <20181114015232.21952-2-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181114015232.21952-1-manasi.d.navare@intel.com> References: <20181114015232.21952-1-manasi.d.navare@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Manasi Navare Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP DSC DPCD color depth register advertises its color depth capabilities by setting each of the bits that corresponding to a specific color depth. This patch defines those specific color depths and adds a helper to return an array of color depth capabilities. Signed-off-by: Manasi Navare Cc: Ville Syrjala --- drivers/gpu/drm/drm_dp_helper.c | 29 +++++++++++++++++++---------- include/drm/drm_dp_helper.h | 9 +++++---- 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 6d483487f2b4..286567063960 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -1428,17 +1428,26 @@ u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) } EXPORT_SYMBOL(drm_dp_dsc_sink_line_buf_depth); -u8 drm_dp_dsc_sink_max_color_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) +void drm_dp_dsc_sink_color_depth_cap(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], + u8 *dsc_sink_color_depth_cap) { + int i, cnt = 0; u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; - if (color_depth & DP_DSC_12_BPC) - return 12; - if (color_depth & DP_DSC_10_BPC) - return 10; - if (color_depth & DP_DSC_8_BPC) - return 8; - - return 0; + for (i = 1; i <= 3; i++) { + if (!(color_depth & BIT(i))) + continue; + switch (i) { + case 1: + dsc_sink_color_depth_cap[cnt++] = DP_DSC_8_BPC; + break; + case 2: + dsc_sink_color_depth_cap[cnt++] = DP_DSC_10_BPC; + break; + case 3: + dsc_sink_color_depth_cap[cnt++] = DP_DSC_12_BPC; + break; + } + } } -EXPORT_SYMBOL(drm_dp_dsc_sink_max_color_depth); +EXPORT_SYMBOL(drm_dp_dsc_sink_color_depth_cap); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 3314e91f6eb3..ea3233b0a790 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -242,9 +242,9 @@ # define DP_DSC_YCbCr420_Native (1 << 4) #define DP_DSC_DEC_COLOR_DEPTH_CAP 0x06A -# define DP_DSC_8_BPC (1 << 1) -# define DP_DSC_10_BPC (1 << 2) -# define DP_DSC_12_BPC (1 << 3) +# define DP_DSC_8_BPC 8 +# define DP_DSC_10_BPC 10 +# define DP_DSC_12_BPC 12 #define DP_DSC_PEAK_THROUGHPUT 0x06B # define DP_DSC_THROUGHPUT_MODE_0_MASK (0xf << 0) @@ -1123,7 +1123,8 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp); u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); -u8 drm_dp_dsc_sink_max_color_depth(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SIZE]); +void drm_dp_dsc_sink_color_depth_cap(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SIZE], + u8 *dsc_sink_color_depth_cap); static inline bool drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])