From patchwork Fri Nov 16 12:54:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 10686267 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D82E21709 for ; Fri, 16 Nov 2018 12:55:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C5FDD2CDAB for ; Fri, 16 Nov 2018 12:55:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B950D2CDB4; Fri, 16 Nov 2018 12:55:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7E7732CDAB for ; Fri, 16 Nov 2018 12:55:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 99C696E797; Fri, 16 Nov 2018 12:55:58 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id CE5A96E797 for ; Fri, 16 Nov 2018 12:55:57 +0000 (UTC) Received: from ziggy.de (unknown [93.176.133.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D8D0E22506; Fri, 16 Nov 2018 12:55:53 +0000 (UTC) From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, matthias.bgg@gmail.com Subject: [PATCH v5 07/12] dt-bindings: clock: mediatek: delete mmsys clocks Date: Fri, 16 Nov 2018 13:54:44 +0100 Message-Id: <20181116125449.23581-8-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181116125449.23581-1-matthias.bgg@kernel.org> References: <20181116125449.23581-1-matthias.bgg@kernel.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, rdunlap@infradead.org, sean.wang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, sean.wang@kernel.org, wens@csie.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Matthias Brugger Some SoCs will now load the clock part of mmsys via a platform device from the dsiplay driver. Remove the compatible from the clock bindings description. Signed-off-by: Matthias Brugger Reviewed-by: Rob Herring --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 15d977afad31..4468345f8b1a 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -6,11 +6,8 @@ The Mediatek mmsys controller provides various clocks to the system. Required Properties: - compatible: Should be one of: - - "mediatek,mt2701-mmsys", "syscon" - "mediatek,mt2712-mmsys", "syscon" - "mediatek,mt6797-mmsys", "syscon" - - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" - - "mediatek,mt8173-mmsys", "syscon" - #clock-cells: Must be 1 The mmsys controller uses the common clk binding from