From patchwork Fri Nov 16 12:54:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 10686275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F03451747 for ; Fri, 16 Nov 2018 12:56:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF6372CDAB for ; Fri, 16 Nov 2018 12:56:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D38992CDB4; Fri, 16 Nov 2018 12:56:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 84E312CDAD for ; Fri, 16 Nov 2018 12:56:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 789E86E798; Fri, 16 Nov 2018 12:56:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by gabe.freedesktop.org (Postfix) with ESMTPS id 243006E798 for ; Fri, 16 Nov 2018 12:56:02 +0000 (UTC) Received: from ziggy.de (unknown [93.176.133.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2ACCA22507; Fri, 16 Nov 2018 12:55:58 +0000 (UTC) From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, matthias.bgg@gmail.com Subject: [PATCH v5 08/12] dt-bindings: mediatek: Change the binding for mmsys clocks Date: Fri, 16 Nov 2018 13:54:45 +0100 Message-Id: <20181116125449.23581-9-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181116125449.23581-1-matthias.bgg@kernel.org> References: <20181116125449.23581-1-matthias.bgg@kernel.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, rdunlap@infradead.org, sean.wang@mediatek.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, sean.wang@kernel.org, wens@csie.org, Matthias Brugger , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Matthias Brugger On SoCs with no publical available HW or no working graphic stack we change the devicetree binding for the mmsys clock part. This way we don't need to register a platform device explicitly in the drm driver. Instead we can create a mmsys child which invokes the clock driver. Signed-off-by: Matthias Brugger --- .../bindings/arm/mediatek/mediatek,mmsys.txt | 21 ++++++++++++------- .../display/mediatek/mediatek,disp.txt | 4 ++++ 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 4468345f8b1a..d4e205981363 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -1,4 +1,4 @@ -Mediatek mmsys controller +Mediatek mmsys clock controller ============================ The Mediatek mmsys controller provides various clocks to the system. @@ -6,18 +6,25 @@ The Mediatek mmsys controller provides various clocks to the system. Required Properties: - compatible: Should be one of: - - "mediatek,mt2712-mmsys", "syscon" - - "mediatek,mt6797-mmsys", "syscon" + - "mediatek,mt2712-mmsys-clk", "syscon" + - "mediatek,mt6797-mmsys-clk", "syscon" - #clock-cells: Must be 1 -The mmsys controller uses the common clk binding from +The mmsys clock controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt The available clocks are defined in dt-bindings/clock/mt*-clk.h. +It is a child of the mmsys block, see binding at: +Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt Example: -mmsys: clock-controller@14000000 { - compatible = "mediatek,mt8173-mmsys", "syscon"; +mmsys: syscon@14000000 { + compatible = "mediatek,mt2712-mmsys", "syscon", "simple-mfd"; reg = <0 0x14000000 0 0x1000>; - #clock-cells = <1>; + + mmsys_clk: clock-controller@14000000 { + compatible = "mediatek,mt2712-mmsys-clk"; + #clock-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index 4b008d992398..38c708cb7e55 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -54,6 +54,10 @@ Required properties (all function blocks): DPI controller nodes have multiple clock inputs. These are documented in mediatek,dsi.txt and mediatek,dpi.txt, respectively. +Some chips have a separate binding for the clock controller, which is a child node +of the mmsys device, for more information see: +Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt + Required properties (DMA function blocks): - compatible: Should be one of "mediatek,-disp-ovl"