From patchwork Mon Dec 3 21:18:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Marek X-Patchwork-Id: 10711313 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6751715A6 for ; Tue, 4 Dec 2018 08:32:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C5282A50D for ; Tue, 4 Dec 2018 08:32:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 506132A513; Tue, 4 Dec 2018 08:32:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F3AA42A50D for ; Tue, 4 Dec 2018 08:32:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 325EE6E21A; Tue, 4 Dec 2018 08:32:18 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-qt1-x841.google.com (mail-qt1-x841.google.com [IPv6:2607:f8b0:4864:20::841]) by gabe.freedesktop.org (Postfix) with ESMTPS id AAE1289C07 for ; Mon, 3 Dec 2018 21:21:09 +0000 (UTC) Received: by mail-qt1-x841.google.com with SMTP id i7so15584080qtj.10 for ; Mon, 03 Dec 2018 13:21:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=bxnZOVi3Uenah6dbS+lwc/jQi8hk5u9BafXjIbd1zAc=; b=agjx2oQamIyFB+lYfJ4r5KqE7PqDjg/VTvy/D9pK+DeRFtNURRAsPKSlO2VolxRpkk RkuxoWt8WbABOWNVRBvoiLodm8UqLASe1D59TbqSj5XQlbyZzjwyAJGoPPk4jPPC+ODp M4EK7aI8zQeZjLEMYNCn1rxLs1QpgznCQYe0K5P/N9d2RvoJ2AJCBX4X5ca17mFMZ8Fs g0pslWFyFYa1dLbvGVLE+qwbFOjBp5uiM4zyIFP1PKmgclHg/bx/NSHOEV6Z+obruclp azne10ibtMuPgSoukFlnS4tspUlcJX9R4Oap6K2AbAz4/nD6HEFV+nazDXYSX2wiSBUA khBw== X-Gm-Message-State: AA+aEWblZGRkAss+UMMx87yXwQv+TNJsUB04/MZkYktvMdx0OYshorZd 6zaUbg0OrQ9Q+3LDM8tpch/d5w== X-Google-Smtp-Source: AFSGD/VbKX+bEZbWwsnYJwwEHgDqVe5acSmApsDB5eSgp8RD/w9AzfDwj2Y4Gfz0FzfZdKtIOzz5UQ== X-Received: by 2002:a0c:9531:: with SMTP id l46mr17045875qvl.175.1543872068753; Mon, 03 Dec 2018 13:21:08 -0800 (PST) Received: from localhost.localdomain (modemcable014.247-57-74.mc.videotron.ca. [74.57.247.14]) by smtp.gmail.com with ESMTPSA id l33sm10567353qta.57.2018.12.03.13.21.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Dec 2018 13:21:07 -0800 (PST) From: Jonathan Marek To: freedreno@lists.freedesktop.org Subject: [PATCH v3 1/4] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment Date: Mon, 3 Dec 2018 16:18:13 -0500 Message-Id: <20181203211816.5129-1-jonathan@marek.ca> X-Mailer: git-send-email 2.17.1 X-Mailman-Approved-At: Tue, 04 Dec 2018 08:32:02 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , David Airlie , "open list:DRM DRIVER FOR MSM ADRENO GPU" , open list , "open list:DRM DRIVER FOR MSM ADRENO GPU" , Rob Herring , Sean Paul , Chris.Healy@zii.aero MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This allows controlling which of the 8 lanes are used for 6 bit color. Signed-off-by: Jonathan Marek --- v3: removed empty line and added documentation .../devicetree/bindings/display/msm/mdp4.txt | 2 ++ .../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 21 ++++++++++++------- 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.txt b/Documentation/devicetree/bindings/display/msm/mdp4.txt index 3c341a15c..b07eeb38f 100644 --- a/Documentation/devicetree/bindings/display/msm/mdp4.txt +++ b/Documentation/devicetree/bindings/display/msm/mdp4.txt @@ -38,6 +38,8 @@ Required properties: Optional properties: - clock-names: the following clocks are optional: * "lut_clk" +- qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be + used for LCDC. This is only valid for 18bpp panels. Example: diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c index 9e08c2efa..c9e34501a 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c @@ -377,20 +377,25 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder) unsigned long pc = mdp4_lcdc_encoder->pixclock; struct mdp4_kms *mdp4_kms = get_kms(encoder); struct drm_panel *panel; + uint32_t config; int i, ret; if (WARN_ON(mdp4_lcdc_encoder->enabled)) return; /* TODO: hard-coded for 18bpp: */ - mdp4_crtc_set_config(encoder->crtc, - MDP4_DMA_CONFIG_R_BPC(BPC6) | - MDP4_DMA_CONFIG_G_BPC(BPC6) | - MDP4_DMA_CONFIG_B_BPC(BPC6) | - MDP4_DMA_CONFIG_PACK_ALIGN_MSB | - MDP4_DMA_CONFIG_PACK(0x21) | - MDP4_DMA_CONFIG_DEFLKR_EN | - MDP4_DMA_CONFIG_DITHER_EN); + config = + MDP4_DMA_CONFIG_R_BPC(BPC6) | + MDP4_DMA_CONFIG_G_BPC(BPC6) | + MDP4_DMA_CONFIG_B_BPC(BPC6) | + MDP4_DMA_CONFIG_PACK(0x21) | + MDP4_DMA_CONFIG_DEFLKR_EN | + MDP4_DMA_CONFIG_DITHER_EN; + + if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb")) + config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB; + + mdp4_crtc_set_config(encoder->crtc, config); mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0); bs_set(mdp4_lcdc_encoder, 1);